Modern voltage source converter topologies for future DC grids

Student thesis: Doctoral Thesis

Abstract

This thesis presents a comprehensive comparison of state-of-the-art HVDC converters with DC fault-blocking capability, based on the modular multilevel converter (MMC) including half-bridge, full-bridge and mixed cell variants, and the alternate arm converter (AAC) topologies. The comparison includes AC and DC power quality, and semiconductor losses considering different operating conditions and design parameters, such as the number of cells and component sizing. In addition a thorough comparison of the transient behaviours is also presented. The transient behaviours of the aforementioned converters are assessed under various conditions including charging sequence, operation in unbalanced grids, and DC fault recovery. Such thorough comparative studies have been performed using high-fidelity converter models which include detailed representation of the control systems that reflect real-scale projects, and of the converter thermal circuit. The main findings of the investigation are intended to assist in the selection of the most suitable converter, given specific performance specifications such as power losses and quality, control range, capacitor voltage ripple, cell capacitor requirements, and improved response during transient operation. The findings of the state-of-the-art HVDC converter comparison inspired two novel topologies, which represent extension of the MMC and AAC topologies.An Enhanced MMC (EMMC) is proposed where the number of output voltage levels is related to the product of the numbers of half-bridge and full-bridge cells rather than the sum. In this way a large number of voltage levels is achievable using a reduced number of cells. In comparison with the conventional MMC, the EMMC reduces the structural complexity and removes the passive filtering, while it has compact footprint for high and medium voltage applications. An improved AAC (IAAC) is proposed which removes completely the need for a DC filter and reduces the DC fault current levels, whilst retaining small footprint and good efficiency. A flexible laboratory scale prototype converter is designed and constructed, providing experimental evidence to support the off-line simulations studies.
Date of Award1 Dec 2017
LanguageEnglish
Awarding Institution
  • University Of Strathclyde
SponsorsUniversity of Strathclyde
SupervisorDerrick Holliday (Supervisor) & Neville McNeill (Supervisor)

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