Projects per year
Abstract
A novel power hardware-in-the-loop interface algorithm, the Virtual Shifting Impedance, is developed, validated and demonstrated in this paper. Building on existing interface algorithms, this method involves shifting a part of the software impedance to the hardware side to improve the stability and accuracy of power hardware-in-the-loop setups. However, compared to existing approaches, this impedance shifting is realized by modifying the command signals of the power amplifier controller, thus avoiding the requirement for hardware passive components. The mathematical derivation of the Virtual Shifting Impedance interface algorithm is realized step-by-step, while its stability and accuracy properties are thoroughly examined. Finally, the applicability of the proposed method is verified through power hardware-in-the-loop simulation results.
Original language | English |
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Pages (from-to) | 2903-2913 |
Number of pages | 11 |
Journal | IEEE Transactions on Industrial Electronics |
Volume | 71 |
Issue number | 3 |
Early online date | 27 Apr 2023 |
DOIs | |
Publication status | Published - 14 Sept 2023 |
Keywords
- power system testing
- power hardware-in-the-loop (PHIL)
- interface algorithms
- real-time simulation
- stability analysis
- accuracy assessment
Fingerprint
Dive into the research topics of 'Virtual shifting impedance method for extended range high-fidelity PHIL testing'. Together they form a unique fingerprint.Projects
- 1 Active
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ERIGRID ll_ European Research Infrastructure supporting Smart Grid and Smart Energy Systems Research, Technology Development (H2020 INFRA IA)
Burt, G., Abdulhadi, I. F., Coffele, F. & Syed, M. H.
European Commission - Horizon 2020
1/04/20 → 30/09/24
Project: Research
Equipment
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Dynamic Power Systems Laboratory
Graeme Burt (Manager)
Electronic And Electrical EngineeringFacility/equipment: Facility
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Current-type power hardware-in-the-loop interface for black-start testing of grid-forming converter
Feng, Z., Alassi, A., Syed, M. H., Pena Alzola, R., Ahmed, K. & Burt, G., 9 Dec 2022. 7 p.Research output: Contribution to conference › Paper › peer-review
Open AccessFile1 Citation (Scopus)55 Downloads (Pure) -
Adaptive Smith predictor for enhanced stability of power hardware-in-the-loop setups
Feng, Z., Peña-Alzola, R., Syed, M. H., Norman, P. J. & Burt, G. M., Oct 2023, In: IEEE Transactions on Industrial Electronics. 70, 10, p. 10204-10214 11 p.Research output: Contribution to journal › Article › peer-review
Open AccessFile1 Citation (Scopus)47 Downloads (Pure) -
Interface compensation for more accurate power transfer and signal synchronization within power hardware-in-the-loop simulation
Feng, Z., Pena Alzola, R., Seisopoulos, P., Syed, M. H., Guillo-Sansano, E., Norman, P. & Burt, G., 13 Nov 2021, IECON 2021 – 47th Annual Conference of the IEEE Industrial Electronics Society. Piscataway, N.J.: IEEE, 8 p. (IECON Proceedings (Industrial Electronics Conference); vol. 2021-October).Research output: Chapter in Book/Report/Conference proceeding › Conference contribution book
Open AccessFile3 Citations (Scopus)32 Downloads (Pure)
Activities
- 1 Invited talk
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Emerging Power Systems Controls and the Challenges of Trusted Validation
Graeme Burt (Invited speaker) & Zhiwang Feng (Contributor)
16 Jul 2023 → 20 Jul 2023Activity: Talk or presentation types › Invited talk