Virtual shifting impedance method for extended range high-fidelity PHIL testing

Alexandros Paspatis, Alkistis Kontou, Zhiwang Feng, Mazheruddin Hussain Syed, Georg Lauss, Graeme Burt, Panos Kotsampopoulos, Nikos Hatziargyriou

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A novel power hardware-in-the-loop interface algorithm, the Virtual Shifting Impedance, is developed, validated and demonstrated in this paper. Building on existing interface algorithms, this method involves shifting a part of the software impedance to the hardware side to improve the stability and accuracy of power hardware-in-the-loop setups. However, compared to existing approaches, this impedance shifting is realized by modifying the command signals of the power amplifier controller, thus avoiding the requirement for hardware passive components. The mathematical derivation of the Virtual Shifting Impedance interface algorithm is realized step-by-step, while its stability and accuracy properties are thoroughly examined. Finally, the applicability of the proposed method is verified through power hardware-in-the-loop simulation results.
Original languageEnglish
Pages (from-to)2903-2913
Number of pages11
JournalIEEE Transactions on Industrial Electronics
Issue number3
Early online date27 Apr 2023
Publication statusPublished - 14 Sept 2023


  • power system testing
  • power hardware-in-the-loop (PHIL)
  • interface algorithms
  • real-time simulation
  • stability analysis
  • accuracy assessment


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