Virtual shifting impedance method for extended range high-fidelity PHIL testing

Alexandros Paspatis; Alkistis Kontou; Zhiwang Feng; Mazheruddin Hussain Syed; Georg Lauss; Graeme Burt; Panos Kotsampopoulos; Nikos Hatziargyriou

doi:10.1109/TIE.2023.3269467

Virtual shifting impedance method for extended range high-fidelity PHIL testing

Alexandros Paspatis, Alkistis Kontou, Zhiwang Feng, Mazheruddin Hussain Syed, Georg Lauss, Graeme Burt, Panos Kotsampopoulos, Nikos Hatziargyriou

Electronic And Electrical Engineering

Research output: Contribution to journal › Article › peer-review

4 Citations (Scopus)

49 Downloads (Pure)

Abstract

A novel power hardware-in-the-loop interface algorithm, the virtual shifting impedance, is developed, validated, and demonstrated in this article. Building on existing interface algorithms, this method involves shifting a part of the software impedance to the hardware side to improve the stability and accuracy of power hardware-in-the-loop setups. However, compared to existing approaches, this impedance shifting is realized by modifying the command signals of the power amplifier controller, thus avoiding the requirement for hardware passive components. The mathematical derivation of the virtual shifting impedance interface algorithm is realized step by step, while its stability and accuracy properties are thoroughly examined. Finally, the applicability of the proposed method is verified through power hardware-in-the-loop simulation results.

Original language	English
Pages (from-to)	2903-2913
Number of pages	11
Journal	IEEE Transactions on Industrial Electronics
Volume	71
Issue number	3
Early online date	27 Apr 2023
DOIs	https://doi.org/10.1109/TIE.2023.3269467
Publication status	Published - Mar 2024

Keywords

power system testing
power hardware-in-the-loop (PHIL)
interface algorithms
real-time simulation
stability analysis
accuracy assessment

UN SDGs

This output contributes to the following UN Sustainable Development Goals (SDGs)

Access to Document

10.1109/TIE.2023.3269467

Paspatis-etal-IEEETIE-2023-Virtual-shifting-impedance-method-for-extended-range-high-fidelity-PHIL-testingAccepted author manuscript, 20.4 MBLicence: Strath_1

1 Finished

ERIGRID ll_ European Research Infrastructure supporting Smart Grid and Smart Energy Systems Research, Technology Development (H2020 INFRA IA)
Burt, G. (Principal Investigator), Abdulhadi, I. F. (Co-investigator), Coffele, F. (Co-investigator) & Syed, M. H. (Co-investigator)
European Commission - Horizon Europe + H2020
1/04/20 → 30/09/24
Project: Research

Dynamic Power Systems Laboratory
Burt, G. (Manager)
Electronic And Electrical Engineering
Facility/equipment: Facility

4 Citations
2 Conference contribution book
1 Paper
1 Article

Adaptive Smith predictor for enhanced stability of power hardware-in-the-loop setups
Feng, Z., Peña-Alzola, R., Syed, M. H., Norman, P. J. & Burt, G. M., Oct 2023, In: IEEE Transactions on Industrial Electronics. 70, 10, p. 10204-10214 11 p.
Research output: Contribution to journal › Article › peer-review

Open Access
File
11 Citations (Scopus)

154 Downloads (Pure)
Current-type power hardware-in-the-loop interface for black-start testing of grid-forming converter
Feng, Z., Alassi, A., Syed, M. H., Pena Alzola, R., Ahmed, K. & Burt, G., 9 Dec 2022. 7 p.
Research output: Contribution to conference › Paper › peer-review

Open Access
File
8 Citations (Scopus)

132 Downloads (Pure)
Interface compensation for more accurate power transfer and signal synchronization within power hardware-in-the-loop simulation
Feng, Z., Pena Alzola, R., Seisopoulos, P., Syed, M. H., Guillo-Sansano, E., Norman, P. & Burt, G., 13 Nov 2021, IECON 2021 – 47th Annual Conference of the IEEE Industrial Electronics Society. Piscataway, N.J.: IEEE, 8 p. (IECON Proceedings (Industrial Electronics Conference); vol. 2021-October).
Research output: Chapter in Book/Report/Conference proceeding › Conference contribution book

Open Access
File
8 Citations (Scopus)

56 Downloads (Pure)

1 Invited talk

Emerging Power Systems Controls and the Challenges of Trusted Validation
Burt, G. (Invited speaker) & Feng, Z. (Contributor)
16 Jul 2023 → 20 Jul 2023
Activity: Talk or presentation types › Invited talk

Cite this

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title = "Virtual shifting impedance method for extended range high-fidelity PHIL testing",

abstract = "A novel power hardware-in-the-loop interface algorithm, the virtual shifting impedance, is developed, validated, and demonstrated in this article. Building on existing interface algorithms, this method involves shifting a part of the software impedance to the hardware side to improve the stability and accuracy of power hardware-in-the-loop setups. However, compared to existing approaches, this impedance shifting is realized by modifying the command signals of the power amplifier controller, thus avoiding the requirement for hardware passive components. The mathematical derivation of the virtual shifting impedance interface algorithm is realized step by step, while its stability and accuracy properties are thoroughly examined. Finally, the applicability of the proposed method is verified through power hardware-in-the-loop simulation results.",

keywords = "power system testing, power hardware-in-the-loop (PHIL), interface algorithms, real-time simulation, stability analysis, accuracy assessment",

author = "Alexandros Paspatis and Alkistis Kontou and Zhiwang Feng and Syed, {Mazheruddin Hussain} and Georg Lauss and Graeme Burt and Panos Kotsampopoulos and Nikos Hatziargyriou",

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AU - Paspatis, Alexandros

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AU - Syed, Mazheruddin Hussain

AU - Lauss, Georg

AU - Burt, Graeme

AU - Kotsampopoulos, Panos

AU - Hatziargyriou, Nikos

N1 - © 2023 IEEE. Personal use of this material is permitted. Permission from IEEE must be obtained for all other uses, in any current or future media, including reprinting /republishing this material for advertising or promotional purposes, creating new collective works, for resale or redistribution to servers or lists, or reuse of any copyrighted component of this work in other works.

PY - 2024/3

Y1 - 2024/3

N2 - A novel power hardware-in-the-loop interface algorithm, the virtual shifting impedance, is developed, validated, and demonstrated in this article. Building on existing interface algorithms, this method involves shifting a part of the software impedance to the hardware side to improve the stability and accuracy of power hardware-in-the-loop setups. However, compared to existing approaches, this impedance shifting is realized by modifying the command signals of the power amplifier controller, thus avoiding the requirement for hardware passive components. The mathematical derivation of the virtual shifting impedance interface algorithm is realized step by step, while its stability and accuracy properties are thoroughly examined. Finally, the applicability of the proposed method is verified through power hardware-in-the-loop simulation results.

AB - A novel power hardware-in-the-loop interface algorithm, the virtual shifting impedance, is developed, validated, and demonstrated in this article. Building on existing interface algorithms, this method involves shifting a part of the software impedance to the hardware side to improve the stability and accuracy of power hardware-in-the-loop setups. However, compared to existing approaches, this impedance shifting is realized by modifying the command signals of the power amplifier controller, thus avoiding the requirement for hardware passive components. The mathematical derivation of the virtual shifting impedance interface algorithm is realized step by step, while its stability and accuracy properties are thoroughly examined. Finally, the applicability of the proposed method is verified through power hardware-in-the-loop simulation results.

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KW - power hardware-in-the-loop (PHIL)

KW - interface algorithms

KW - real-time simulation

KW - stability analysis

KW - accuracy assessment

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JO - IEEE Transactions on Industrial Electronics

JF - IEEE Transactions on Industrial Electronics

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Virtual shifting impedance method for extended range high-fidelity PHIL testing

Abstract

Keywords

UN SDGs

Access to Document

Fingerprint

Projects

ERIGRID ll_ European Research Infrastructure supporting Smart Grid and Smart Energy Systems Research, Technology Development (H2020 INFRA IA)

Equipment

Dynamic Power Systems Laboratory

Research output

Adaptive Smith predictor for enhanced stability of power hardware-in-the-loop setups

Current-type power hardware-in-the-loop interface for black-start testing of grid-forming converter

Interface compensation for more accurate power transfer and signal synchronization within power hardware-in-the-loop simulation

Activities

Emerging Power Systems Controls and the Challenges of Trusted Validation

Cite this