Transporting multiple classes of traffic over a generic routing device - an investigation into the performance of the rapidio interconnect architecture

M. McKenny, J. Dines, D.A. Harle

Research output: Chapter in Book/Report/Conference proceedingConference contribution book

4 Citations (Scopus)

Abstract

RapidIO(TM) is a pseudo-serial, source-synchronous, point-to-point interconnect which enables reliable, high-speed intra-system communication. The RapidIO physical layer utilises Low-Voltage Differential Signaling (LVDS) pairs that interconnect RapidIO link partners belonging to end-points or central switch fabrics. The following is an investigation into the performance of the RapidIO architecture when deployed as the interconnection between the components of a generic switch device. A discrete event simulation model of such a system has been developed enabling various compositions of traffic to be offered to the device. Extensive simulations have enabled a quantitative analysis of various performance metrics that indicate how the device deals with various classes of traffic under saturating and non-saturating aggregate traffic loads. The results therefore provide an insight into the general performance capabilities of the RapidIO architecture as a transport protocol as well as outlining some specific issues regarding implementing RapidIO to interconnect components of a generic switch device
Original languageEnglish
Title of host publicationICON 2003
Subtitle of host publicationinternational conference on networks
Place of PublicationNew York
PublisherIEEE
Pages39-44
Number of pages6
ISBN (Print)0780377885
DOIs
Publication statusPublished - 2003
Event11th IEEE International Conference on Networks - Sydney, Australia
Duration: 28 Sep 20031 Oct 2003

Conference

Conference11th IEEE International Conference on Networks
Abbreviated titleICON 2003
CountryAustralia
CitySydney
Period28/09/031/10/03

Keywords

  • transporting
  • multiple classes
  • traffic
  • generic routing device
  • investigation
  • performance
  • rapidIO
  • interconnect architecture

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