The use of real time digital simulation and hardware in the loop to de-risk novel control algorithms

S. Loddick, U. Mupambireyi, S. Blair, C. Booth, X. Li, A. Roscoe, K. Daffey, J. Watson

Research output: Chapter in Book/Report/Conference proceedingConference contribution book

6 Citations (Scopus)
31 Downloads (Pure)

Abstract

Low power demonstrators are commonly used to validate novel control algorithms. However, the response of the demonstrator to network transients and faults is often unexplored. The importance of this work has, in the past, justified facilities such as the T45 Shore Integration Test Facility (SITF) at the Electric Ship Technology Demonstrator (ESTD). This paper presents the use of real time digital simulation and hardware in the loop to de-risk a innovative control algorithm with respect to network transients and faults. A novel feature of the study is the modelling of events at the power electronics level (time steps of circa 2 μs) and the system level (time steps of circa 50 μs).
Original languageEnglish
Title of host publicationProceedings of the 2011 IEEE Electric Ship Technologies Symposium (ESTS)
PublisherIEEE
Pages213-218
Number of pages6
ISBN (Print)9781424492725
DOIs
Publication statusPublished - Apr 2011
Event2011 IEEE Electric Ship Technologies Symposium (ESTS) - Rugby, United Kingdom
Duration: 10 Apr 201113 Apr 2011

Conference

Conference2011 IEEE Electric Ship Technologies Symposium (ESTS)
CountryUnited Kingdom
CityRugby
Period10/04/1113/04/11

Keywords

  • propulsion
  • real time systems
  • software
  • hardware
  • transient analysis

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    Loddick, S., Mupambireyi, U., Blair, S., Booth, C., Li, X., Roscoe, A., Daffey, K., & Watson, J. (2011). The use of real time digital simulation and hardware in the loop to de-risk novel control algorithms. In Proceedings of the 2011 IEEE Electric Ship Technologies Symposium (ESTS) (pp. 213-218). IEEE. https://doi.org/10.1109/ESTS.2011.5770869