Systolic array based concurrent processing for real-time high performance control

E. Rogers, Yun Li

Research output: Contribution to journalArticle

1 Citation (Scopus)

Abstract

Concurrent processing techniques are applied to real-time high-performance control problems. In particular, four shortest-latency systolic array architectures are developed for controller implementation in such problems at word level. A technique termed 'M-expanded pipelining' is used to pipeline these architectures to an arbitrary deeper level. Some preliminary results concerning the expected performance of these architectures are presented.

Original languageEnglish
Pages (from-to)2236-2237
Number of pages2
JournalProceedings of the IEEE Conference on Decision and Control
Publication statusPublished - 1 Dec 1988

Keywords

  • systolic array
  • concurrent processing
  • real-time high performance control

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  • Cite this

    Rogers, E., & Li, Y. (1988). Systolic array based concurrent processing for real-time high performance control. Proceedings of the IEEE Conference on Decision and Control, 2236-2237.