Reduction of oscillations in a GaN bridge leg using active gate driving with sub-ns resolution, arbitrary gate-impedance patterns

Harry Dymond, David Liu, Joyce Wang, Jeremy Dalton, Neville McNeill, Dinesh Pamunuwa, Simon Hollis, Bernard Stark

Research output: Chapter in Book/Report/Conference proceedingConference contribution book

10 Citations (Scopus)

Abstract

Active gate driving provides an opportunity to reduce EMI in power electronic circuits. Whilst it has been demonstrated for MOS-gated silicon power semiconductor devices, reported advanced gate driving in wide-bandgap devices has been limited to a single impedance change during the device switching transitions. For the first time, this paper shows multi-point gate signal profiling at the sub-ns resolution required for GaN devices. A high-speed, programmable active gate driver is implemented with an integrated high-speed memory and output stage to realise arbitrary gate pull-up and pulldown resistance profiles. The nominal resistance range is 120 μΩ to 64 Ω, and the timing resolution of impedance changes is 150 ps. This driver is used in a 1 MHz GaN bridge leg that represents a synchronous buck converter. It is demonstrated that the gate voltage profile can be manipulated aggressively in nanosecond scale. It is observed that by profiling the first 5 ns of the control device's gate voltage transient, a reduction in switch-node voltage oscillations is observed, resulting in an 8-16 dB reduction in spectral power between 400 MHz and 1.8 GHz. This occurs without an increase in switching loss. A small increase in spectral power is seen below 320 MHz. As a baseline for comparison, the GaN bridge leg is operated with a fixed gate drive strength. It is concluded that p-type gate GaN HFETs are actively controllable, and that EMI can be reduced without increasing switching loss.
Original languageEnglish
Title of host publication2016 IEEE Energy Conversion Congress and Exposition (ECCE)
Place of PublicationPiscataway, N.J.
PublisherIEEE
ISBN (Print)978-1-5090-0738-7
DOIs
Publication statusPublished - 18 Sep 2016
Event8th IEEE Energy Conversion Congress and Exposition -
Duration: 18 Sep 201622 Sep 2016

Conference

Conference8th IEEE Energy Conversion Congress and Exposition
Period18/09/1622/09/16

Fingerprint

Electric potential
Power electronics
Energy gap
Switches
Data storage equipment
Silicon
Networks (circuits)
Power semiconductor devices

Keywords

  • logic gates
  • oscillators
  • gallium nitride
  • electromagnetic interference

Cite this

Dymond, H., Liu, D., Wang, J., Dalton, J., McNeill, N., Pamunuwa, D., ... Stark, B. (2016). Reduction of oscillations in a GaN bridge leg using active gate driving with sub-ns resolution, arbitrary gate-impedance patterns. In 2016 IEEE Energy Conversion Congress and Exposition (ECCE) Piscataway, N.J.: IEEE. https://doi.org/10.1109/ECCE.2016.7855385
Dymond, Harry ; Liu, David ; Wang, Joyce ; Dalton, Jeremy ; McNeill, Neville ; Pamunuwa, Dinesh ; Hollis, Simon ; Stark, Bernard. / Reduction of oscillations in a GaN bridge leg using active gate driving with sub-ns resolution, arbitrary gate-impedance patterns. 2016 IEEE Energy Conversion Congress and Exposition (ECCE). Piscataway, N.J. : IEEE, 2016.
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abstract = "Active gate driving provides an opportunity to reduce EMI in power electronic circuits. Whilst it has been demonstrated for MOS-gated silicon power semiconductor devices, reported advanced gate driving in wide-bandgap devices has been limited to a single impedance change during the device switching transitions. For the first time, this paper shows multi-point gate signal profiling at the sub-ns resolution required for GaN devices. A high-speed, programmable active gate driver is implemented with an integrated high-speed memory and output stage to realise arbitrary gate pull-up and pulldown resistance profiles. The nominal resistance range is 120 μΩ to 64 Ω, and the timing resolution of impedance changes is 150 ps. This driver is used in a 1 MHz GaN bridge leg that represents a synchronous buck converter. It is demonstrated that the gate voltage profile can be manipulated aggressively in nanosecond scale. It is observed that by profiling the first 5 ns of the control device's gate voltage transient, a reduction in switch-node voltage oscillations is observed, resulting in an 8-16 dB reduction in spectral power between 400 MHz and 1.8 GHz. This occurs without an increase in switching loss. A small increase in spectral power is seen below 320 MHz. As a baseline for comparison, the GaN bridge leg is operated with a fixed gate drive strength. It is concluded that p-type gate GaN HFETs are actively controllable, and that EMI can be reduced without increasing switching loss.",
keywords = "logic gates, oscillators, gallium nitride, electromagnetic interference",
author = "Harry Dymond and David Liu and Joyce Wang and Jeremy Dalton and Neville McNeill and Dinesh Pamunuwa and Simon Hollis and Bernard Stark",
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Dymond, H, Liu, D, Wang, J, Dalton, J, McNeill, N, Pamunuwa, D, Hollis, S & Stark, B 2016, Reduction of oscillations in a GaN bridge leg using active gate driving with sub-ns resolution, arbitrary gate-impedance patterns. in 2016 IEEE Energy Conversion Congress and Exposition (ECCE). IEEE, Piscataway, N.J., 8th IEEE Energy Conversion Congress and Exposition, 18/09/16. https://doi.org/10.1109/ECCE.2016.7855385

Reduction of oscillations in a GaN bridge leg using active gate driving with sub-ns resolution, arbitrary gate-impedance patterns. / Dymond, Harry; Liu, David; Wang, Joyce; Dalton, Jeremy; McNeill, Neville; Pamunuwa, Dinesh; Hollis, Simon; Stark, Bernard.

2016 IEEE Energy Conversion Congress and Exposition (ECCE). Piscataway, N.J. : IEEE, 2016.

Research output: Chapter in Book/Report/Conference proceedingConference contribution book

TY - GEN

T1 - Reduction of oscillations in a GaN bridge leg using active gate driving with sub-ns resolution, arbitrary gate-impedance patterns

AU - Dymond, Harry

AU - Liu, David

AU - Wang, Joyce

AU - Dalton, Jeremy

AU - McNeill, Neville

AU - Pamunuwa, Dinesh

AU - Hollis, Simon

AU - Stark, Bernard

PY - 2016/9/18

Y1 - 2016/9/18

N2 - Active gate driving provides an opportunity to reduce EMI in power electronic circuits. Whilst it has been demonstrated for MOS-gated silicon power semiconductor devices, reported advanced gate driving in wide-bandgap devices has been limited to a single impedance change during the device switching transitions. For the first time, this paper shows multi-point gate signal profiling at the sub-ns resolution required for GaN devices. A high-speed, programmable active gate driver is implemented with an integrated high-speed memory and output stage to realise arbitrary gate pull-up and pulldown resistance profiles. The nominal resistance range is 120 μΩ to 64 Ω, and the timing resolution of impedance changes is 150 ps. This driver is used in a 1 MHz GaN bridge leg that represents a synchronous buck converter. It is demonstrated that the gate voltage profile can be manipulated aggressively in nanosecond scale. It is observed that by profiling the first 5 ns of the control device's gate voltage transient, a reduction in switch-node voltage oscillations is observed, resulting in an 8-16 dB reduction in spectral power between 400 MHz and 1.8 GHz. This occurs without an increase in switching loss. A small increase in spectral power is seen below 320 MHz. As a baseline for comparison, the GaN bridge leg is operated with a fixed gate drive strength. It is concluded that p-type gate GaN HFETs are actively controllable, and that EMI can be reduced without increasing switching loss.

AB - Active gate driving provides an opportunity to reduce EMI in power electronic circuits. Whilst it has been demonstrated for MOS-gated silicon power semiconductor devices, reported advanced gate driving in wide-bandgap devices has been limited to a single impedance change during the device switching transitions. For the first time, this paper shows multi-point gate signal profiling at the sub-ns resolution required for GaN devices. A high-speed, programmable active gate driver is implemented with an integrated high-speed memory and output stage to realise arbitrary gate pull-up and pulldown resistance profiles. The nominal resistance range is 120 μΩ to 64 Ω, and the timing resolution of impedance changes is 150 ps. This driver is used in a 1 MHz GaN bridge leg that represents a synchronous buck converter. It is demonstrated that the gate voltage profile can be manipulated aggressively in nanosecond scale. It is observed that by profiling the first 5 ns of the control device's gate voltage transient, a reduction in switch-node voltage oscillations is observed, resulting in an 8-16 dB reduction in spectral power between 400 MHz and 1.8 GHz. This occurs without an increase in switching loss. A small increase in spectral power is seen below 320 MHz. As a baseline for comparison, the GaN bridge leg is operated with a fixed gate drive strength. It is concluded that p-type gate GaN HFETs are actively controllable, and that EMI can be reduced without increasing switching loss.

KW - logic gates

KW - oscillators

KW - gallium nitride

KW - electromagnetic interference

UR - http://ieeexplore.ieee.org/document/7855385/

U2 - 10.1109/ECCE.2016.7855385

DO - 10.1109/ECCE.2016.7855385

M3 - Conference contribution book

SN - 978-1-5090-0738-7

BT - 2016 IEEE Energy Conversion Congress and Exposition (ECCE)

PB - IEEE

CY - Piscataway, N.J.

ER -

Dymond H, Liu D, Wang J, Dalton J, McNeill N, Pamunuwa D et al. Reduction of oscillations in a GaN bridge leg using active gate driving with sub-ns resolution, arbitrary gate-impedance patterns. In 2016 IEEE Energy Conversion Congress and Exposition (ECCE). Piscataway, N.J.: IEEE. 2016 https://doi.org/10.1109/ECCE.2016.7855385