TY - JOUR
T1 - Reconfigurable FPGAs for data compression in ultrasonic non-destructive testing
AU - Darlington, David J.
AU - Campbell, Douglas R.
AU - Lines, David
PY - 1997/12/1
Y1 - 1997/12/1
N2 - Ultrasonic imaging techniques are long established in the medical field, but have not found the same level of acceptance in non-destructive testing (NDT). Operators of NDT equipment are less comfortable using 2D images despite the easier flaw characterisation which they permit. However, where the specific requirement is rapid inspection of large areas, the generation of a cross-sectional image in real time can deliver a benefit by reducing inspection time. The DSL Flaw Imager, which was developed using medical application techniques, has found a use in this field, but to address a potentially larger market the size, weight and cost of the instrument must be reduced. This can be achieved by the use of reconfigurable computing elements to implement the essential data compression. Reconfigurable computing features field programmable gate arrays (FPGAs) performing a variety of operations in hardware, the control program being executed on a microprocessor. This reconfigurability provides an advantage, in that sections can be powered down when not in use, or a new configuration program introduced to implement analysis algorithms. More vital to this work is the fast microprocessor interface of one implementation of this emerging technology, the Xilinx XC6200 reconfigure development system, which allows the reconfigurable unit to interface with a controlling PC while still operating at the high processing speeds required. An end user's perspective is offered on practical experience with this system for the described application.
AB - Ultrasonic imaging techniques are long established in the medical field, but have not found the same level of acceptance in non-destructive testing (NDT). Operators of NDT equipment are less comfortable using 2D images despite the easier flaw characterisation which they permit. However, where the specific requirement is rapid inspection of large areas, the generation of a cross-sectional image in real time can deliver a benefit by reducing inspection time. The DSL Flaw Imager, which was developed using medical application techniques, has found a use in this field, but to address a potentially larger market the size, weight and cost of the instrument must be reduced. This can be achieved by the use of reconfigurable computing elements to implement the essential data compression. Reconfigurable computing features field programmable gate arrays (FPGAs) performing a variety of operations in hardware, the control program being executed on a microprocessor. This reconfigurability provides an advantage, in that sections can be powered down when not in use, or a new configuration program introduced to implement analysis algorithms. More vital to this work is the fast microprocessor interface of one implementation of this emerging technology, the Xilinx XC6200 reconfigure development system, which allows the reconfigurable unit to interface with a controlling PC while still operating at the high processing speeds required. An end user's perspective is offered on practical experience with this system for the described application.
UR - http://www.scopus.com/inward/record.url?scp=0031221219&partnerID=8YFLogxK
M3 - Article
AN - SCOPUS:0031221219
SN - 0963-3308
SP - 2/1-2/4
JO - IEE Colloquium (Digest)
JF - IEE Colloquium (Digest)
IS - 301
ER -