Real-time control systems design using a high speed rapid response systolic array

E. Rogers, Y. Li

Research output: Contribution to journalArticle

Abstract

Systolic/wavefront array architectures for real-time digital control system design are considered. Described is the development of word-level systolic and wavefront architectures for recursive filtering and on-line feedback control schemes. Each of these arrays uses only one type of cell and has the same array configuration. These offer a word-level shortest processing delay (or system latency) of one cycle, while retaining a very high throughput rate, and hence are applicable to real-time feedback control engineering problems.

Original languageEnglish
Pages (from-to)947-949
Number of pages3
JournalProceedings of the IEEE Conference on Decision and Control
Volume2
DOIs
Publication statusPublished - 5 Dec 1990

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Keywords

  • control system CAD
  • digital control
  • feedback
  • systolic arrays

Cite this

Rogers, E., & Li, Y. (1990). Real-time control systems design using a high speed rapid response systolic array. Proceedings of the IEEE Conference on Decision and Control, 2, 947-949. https://doi.org/10.1109/CDC.1990.203730