Rapid prototyping of a test harness for forward error correcting codes

James Irvine, E. Brown, W. Wilkie

Research output: Contribution to conferencePaper

Abstract

This paper presents a design flow for the rapid prototyping of forward error correction (FEC) systems in the Xilinx System Generator tool. In this instance two FEC systems were tested, both Turbo codec's. One was designed to comply with the UMTS standard, the other was designed to comply with the cdma2000 standard. The target hardware for this system is a Field Programmable Gate Array (FPGA). The System Generator tool and the cdma2000 Turbo code standard are discussed. A description of the implemented test harness is given along with simulation results and a comparison of simulation times for both hardware and software implementations of the system.
Original languageEnglish
Pages276-276
Number of pages1
DOIs
Publication statusPublished - 2005
EventFPGA '05 Proceedings of the 2005 ACM/SIGDA 13th international symposium on Field-programmable gate arrays - Monterey, CA, United States
Duration: 20 Feb 200522 Feb 2005

Conference

ConferenceFPGA '05 Proceedings of the 2005 ACM/SIGDA 13th international symposium on Field-programmable gate arrays
CountryUnited States
CityMonterey, CA
Period20/02/0522/02/05

Keywords

  • rapid prototyping
  • test harness
  • forward error correcting codes
  • forward error correction (FEC) systems
  • Field Programmable Gate Array (FPGA)
  • system generator tool

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