Quasi two-level operation of a five-level inverter

G.P. Adam, S.J. Finney, B.W. Williams

Research output: Chapter in Book/Report/Conference proceedingConference contribution book

3 Citations (Scopus)

Abstract

In this paper a five-level inverter operational mode termed quasi two-level operation is proposed. The multilevel capacitors function in a soft clamping mode where capacitor voltage balancing is maintained by varying the transient dwell time at each level. Two balancing techniques are proposed. The first is based on the selection of suitable resistors to be connected across each dc link capacitor in order to maintain balance. The second method is based on varying the dwell time at the intermediate nodes of the dc link capacitors. The validity of the operational mode and the two proposed balancing techniques are confirmed by simulations and experiments.
Original languageEnglish
Title of host publicationProceedings of Compatibility in Power Electronics, 2007
PublisherIEEE
Pages1-6
Number of pages6
ISBN (Print)1-4244-1055-X
DOIs
Publication statusPublished - 4 Sep 2007
Event5th International IEEE Conference on Compatibility in Power Electronics - Gdańsk, Poland
Duration: 29 May 20071 Jun 2007
http://www.pedc.am.gdynia.pl/cpe2007/

Conference

Conference5th International IEEE Conference on Compatibility in Power Electronics
Abbreviated titleCPE2007
CountryPoland
CityGdańsk
Period29/05/071/06/07
Internet address

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Keywords

  • capacitors
  • circuits
  • clamps
  • diodes
  • pulse width modulation inverters
  • resistors

Cite this

Adam, G. P., Finney, S. J., & Williams, B. W. (2007). Quasi two-level operation of a five-level inverter. In Proceedings of Compatibility in Power Electronics, 2007 (pp. 1-6). IEEE. https://doi.org/10.1109/CPE.2007.4296557