Properties of semiconductor surfaces covered with very thin insulating overlayers prepared by impacts of low-energy particles

E. Pincik, H. Gleskova, J. Mullerova, V. Nadazdy, S. Mraz, L. Ortega, M. Jergel, C. Falcony, R. Brunner, K. Gmucova, M. Zeman, R. A. C. M. M. van Swaaij, M. Kucera, R. Jurani, M. Zahoran

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This paper deals with the formation of very thin insulating layers on crystalline (GaAs) and amorphous semiconductors (a-Si:H and a-SiGe:H) prepared by the impacts of particles of a very low energy. Plasma, ion beams and plasma immersion ion implantation (PIII) as the sources of impacting particles were used and compared. The last technique was applied successfully for the first time in the case of amorphous silicon-based semiconductors. More diagnostics techniques were used for the investigation of the transformation of the semiconductor surface properties. In the a-Si:H based MOS structures prepared by PIII technology, only two groups of defects 0.82 and 1.25 eV (D(z) and D(e), respectively) were found. We suppose that the PIII technology using the implantation at the sample voltage of ca. -1000V causes the formation of a-Si:H layers with missing group of D(h) states. The only decisive parameter determining the formation of two groups of states is the negative potential of the sample during the implantation. In aSiGe:H based MOS structures, three distributions could be prepared by a bias annealing procedure: 0.47, 0.58 and 0.95 eV corresponding to p-type (D(h)) intrinsic (D(z)) and n-type (D(e)) distributions, respectively.
Original languageEnglish
Pages (from-to)131-141
Number of pages11
Issue number1
Publication statusPublished - 2002
Event2nd International Workshop on Semiconductor Surface Passivation - Ustron, Poland
Duration: 10 Sep 200113 Sep 2001



  • low-energy particles
  • semiconductor surfaces

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