Parallel marching blocks: a practical isosurfacing algorithm for large data on many-core architectures.

Baoquan Liu, Gordon J. Clapworthy, Feng Dong, Enhua Wu

Research output: Contribution to journalArticle

1 Citation (Scopus)
11 Downloads (Pure)

Abstract

Interactive isosurface visualisation has been made possible by mapping algorithms to GPU architectures. However, current state‐of‐the‐art isosurfacing algorithms usually consume large amounts of GPU memory owing to the additional acceleration structures they require. As a result, the continued limitations on available GPU memory mean that they are unable to deal with the larger datasets that are now increasingly becoming prevalent.

This paper proposes a new parallel isosurface‐extraction algorithm that exploits the blocked organisation of the parallel threads found in modern many‐core platforms to achieve fast isosurface extraction and reduce the associated memory requirements. This is achieved by optimising thread co‐operation within thread‐blocks and reducing redundant computation; ultimately, an indexed triangular mesh can be produced.

Experiments have shown that the proposed algorithm is much faster (up to 10×) than state‐of‐the‐art GPU algorithms and has a much smaller memory footprint, enabling it to handle much larger datasets (up to 64×) on the same GPU.
Original languageEnglish
Pages (from-to)211-220
Number of pages10
JournalComputer Graphics Forum
Volume35
Issue number3
DOIs
Publication statusPublished - 4 Jul 2016

    Fingerprint

Keywords

  • many‐core architectures
  • isosurfacing algorithm
  • parallel marching blocks

Cite this