Multichannel time-to-digital converters with automatic calibration in Xilinx Zynq-7000 FPGA devices

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Abstract

This paper proposes a weighted histogram method and an automatic calibration architecture to implement high-linearity time-to-digital converters (TDCs) 16 in low-cost advanced RISC machine (ARM)-based field-programmable gate arrays (FPGAs). The proposed method significantly reduces nonlinearity induced by nonuniform bins. It offers automatic calibration without manual interventions using ARM processors. Besides, our design is cost-effective in hardware consumption. We implemented and evaluated a 32-channel TDC system in a low-cost Zynq-7000 ARM-based FPGA, in which the programable logic is equivalent to a 28 nm Artix-7 FPGA. The proposed TDC offers a resolution of 9.83 ps (LSB = 9.83 ps) with good uniformity, achieving an averaged peak-peak differential nonlinearity (DNLpk-pk) of 0.27 LSB, and an averaged peak-to-peak integral nonlinearity 28 (INLpk-pk) of 0.67LSB.
Original languageEnglish
Number of pages10
JournalIEEE Transactions on Industrial Electronics
Early online date15 Sep 2021
DOIs
Publication statusE-pub ahead of print - 15 Sep 2021

Keywords

  • time-to-digital converter (TDC)
  • carry chains
  • field programmable gate array

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