Abstract
One of the greatest perceived barriers to the widespread use of FPGAs in image processing is the difficulty for application specialists of developing algorithms on reconfigurable hardware. Minimum entropy deconvolution (MED) techniques
have been shown to be effective in the restoration of star-field images. This paper reports on an attempt to implement a MED algorithm using simulated annealing, first on a microprocessor, then on an FPGA. The FPGA implementation uses DIME-C, a C-to-gates compiler, coupled with a low-level core library to simplify the design task. Analysis of the C code and output from the DIME-C compiler guided the code optimisation. The paper reports on the design effort that this entailed and the resultant performance improvements.
have been shown to be effective in the restoration of star-field images. This paper reports on an attempt to implement a MED algorithm using simulated annealing, first on a microprocessor, then on an FPGA. The FPGA implementation uses DIME-C, a C-to-gates compiler, coupled with a low-level core library to simplify the design task. Analysis of the C code and output from the DIME-C compiler guided the code optimisation. The paper reports on the design effort that this entailed and the resultant performance improvements.
Original language | English |
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Publication status | Published - 2007 |
Event | 15th European Signal Processing Conference - Poznan , Poland Duration: 3 Sept 2007 → 7 Sept 2007 |
Conference
Conference | 15th European Signal Processing Conference |
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Abbreviated title | EUSIPCO 2007 |
Country/Territory | Poland |
City | Poznan |
Period | 3/09/07 → 7/09/07 |
Keywords
- entropy
- minimum entropy deconvolution
- FPGA
- high-level techniques