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Layout Optimization of Integrated Trench VDMOS Arrays
Terry Dyer
(Inventor), Andrew Strachan (Inventor)
Physics
Research output
:
Patent
Overview
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Dive into the research topics of 'Layout Optimization of Integrated Trench VDMOS Arrays'. Together they form a unique fingerprint.
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Earth and Planetary Sciences
Array
100%
Layout
100%
Trench
100%
Optimization
100%
Drain
66%
Ratio
66%
Spacing
33%
Geometry
33%
Invention
33%
Area
33%
Elongation
33%
Aspect
33%
Convention
33%
Material Science
Cell
100%
Devices
100%
Chemistry
Optimization
100%
Device
66%
Number
33%
Engineering
Array Orientation
33%
Cell Source
33%