Abstract
Diode-clamped, three-level, three-phase inverters display mid-point voltage excursions that cause low-frequency harmonic distortion in the output voltage spectrum. This paper illustrates that a significant reduction in the excursion is achieved by adopting a multi-phase approach. Practical and simulation results are presented.
| Original language | English |
|---|---|
| Pages (from-to) | 68-70 |
| Number of pages | 3 |
| Journal | International Review of Electrical Engineering |
| Volume | 2 |
| Issue number | 1 |
| Publication status | Published - 2007 |
Keywords
- multi-level multi-phase
- voltage imbalance
- diode clamped inverter
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