Interface compensation for more accurate power transfer and signal synchronization within power hardware-in-the-loop simulation

Zhiwang Feng; Rafael Pena Alzola; Paschalis Seisopoulos; Mazheruddin Hussain Syed; Efren  Guillo-Sansano; Patrick Norman; Graeme Burt

doi:10.1109/IECON48115.2021.9589158

Interface compensation for more accurate power transfer and signal synchronization within power hardware-in-the-loop simulation

Zhiwang Feng, Rafael Pena Alzola, Paschalis Seisopoulos, Mazheruddin Hussain Syed, Efren Guillo-Sansano, Patrick Norman, Graeme Burt

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution book

3 Citations (Scopus)

30 Downloads (Pure)

Abstract

Power hardware-in-the-loop (PHIL) simulation leverages the real-time emulation of a large-scale complex power system, while also enabling the in-depth investigation of novel actual power components and their interactions with the emulated power grid. The dynamics and non-ideal characteristics (e.g., time delay, non-unity gain, and limited bandwidth) of the power interface result in stability and accuracy issues within the PHIL closed-loop simulations. In this paper, a compensation method is proposed to compensate for the non-ideal power interface by maximizing its bandwidth, maintaining its unity-gain characteristic, and compensating for its phase-shift over the frequencies of interest. The accuracy of power signals synchronization and the transparency of power transfer within the PHIL configuration are assessed by employing the error metrics. In conjunction with the frequency-domain stability analysis and the time-domain simulations, a case study is made to validate the proposed compensation method.

Original language	English
Title of host publication	IECON 2021 – 47th Annual Conference of the IEEE Industrial Electronics Society
Place of Publication	Piscataway, N.J.
Publisher	IEEE
Number of pages	8
ISBN (Electronic)	9781665435543
ISBN (Print)	9781665402569
DOIs	https://doi.org/10.1109/IECON48115.2021.9589158
Publication status	Published - 13 Nov 2021
Event	IECON 2021 – 47th Annual Conference of the IEEE Industrial Electronics Society - Toronto, Toronto, Canada Duration: 13 Oct 2021 → 16 Oct 2021 https://ieeeiecon.org/

Publication series

Name	IECON Proceedings (Industrial Electronics Conference)
Volume	2021-October

Conference

Conference	IECON 2021 – 47th Annual Conference of the IEEE Industrial Electronics Society
Country/Territory	Canada
City	Toronto
Period	13/10/21 → 16/10/21
Internet address	https://ieeeiecon.org/

Keywords

power hardware-in-the-loop (PHIL)
power transfer
signal synchronization
power interface compensation
stability analysis
accuracy assessment

Access to Document

10.1109/IECON48115.2021.9589158

Feng-etal-IECON-2021-Interface-compensation-for-more-accurate-power-transfer-and-signal-synchronizationAccepted author manuscript, 1.07 MB

3 Citations
3 Article
1 Conference contribution book
1 Paper

Virtual shifting impedance method for extended range high-fidelity PHIL testing
Paspatis, A., Kontou, A., Feng, Z., Syed, M. H., Lauss, G., Burt, G., Kotsampopoulos, P. & Hatziargyriou, N., 27 Apr 2023, (E-pub ahead of print) In: IEEE Transactions on Industrial Electronics. p. 1-10 10 p.
Research output: Contribution to journal › Article › peer-review

Open Access
File
1 Downloads (Pure)
Current-type power hardware-in-the-loop interface for black-start testing of grid-forming converter
Feng, Z., Alassi, A., Syed, M. H., Pena Alzola, R., Ahmed, K. & Burt, G., 9 Dec 2022. 7 p.
Research output: Contribution to conference › Paper › peer-review

Open Access
File
1 Citation (Scopus)

47 Downloads (Pure)
Adaptive Smith predictor for enhanced stability of power hardware-in-the-loop setups
Feng, Z., Peña-Alzola, R., Syed, M. H., Norman, P. J. & Burt, G. M., Oct 2023, In: IEEE Transactions on Industrial Electronics. 70, 10, p. 10204-10214 11 p.
Research output: Contribution to journal › Article › peer-review

Open Access
File
44 Downloads (Pure)

Cite this

Feng, Z., Pena Alzola, R., Seisopoulos, P., Syed, M. H., Guillo-Sansano, E., Norman, P., & Burt, G. (2021). Interface compensation for more accurate power transfer and signal synchronization within power hardware-in-the-loop simulation. In IECON 2021 – 47th Annual Conference of the IEEE Industrial Electronics Society (IECON Proceedings (Industrial Electronics Conference); Vol. 2021-October). IEEE. https://doi.org/10.1109/IECON48115.2021.9589158

Feng, Zhiwang ; Pena Alzola, Rafael ; Seisopoulos, Paschalis et al. / Interface compensation for more accurate power transfer and signal synchronization within power hardware-in-the-loop simulation. IECON 2021 – 47th Annual Conference of the IEEE Industrial Electronics Society. Piscataway, N.J. : IEEE, 2021. (IECON Proceedings (Industrial Electronics Conference)).

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abstract = "Power hardware-in-the-loop (PHIL) simulation leverages the real-time emulation of a large-scale complex power system, while also enabling the in-depth investigation of novel actual power components and their interactions with the emulated power grid. The dynamics and non-ideal characteristics (e.g., time delay, non-unity gain, and limited bandwidth) of the power interface result in stability and accuracy issues within the PHIL closed-loop simulations. In this paper, a compensation method is proposed to compensate for the non-ideal power interface by maximizing its bandwidth, maintaining its unity-gain characteristic, and compensating for its phase-shift over the frequencies of interest. The accuracy of power signals synchronization and the transparency of power transfer within the PHIL configuration are assessed by employing the error metrics. In conjunction with the frequency-domain stability analysis and the time-domain simulations, a case study is made to validate the proposed compensation method.",

keywords = "power hardware-in-the-loop (PHIL), power transfer, signal synchronization, power interface compensation, stability analysis, accuracy assessment",

author = "Zhiwang Feng and {Pena Alzola}, Rafael and Paschalis Seisopoulos and Syed, {Mazheruddin Hussain} and Efren Guillo-Sansano and Patrick Norman and Graeme Burt",

note = "{\textcopyright} 2021 IEEE. Personal use of this material is permitted. Permission from IEEE must be obtained for all other uses, in any current or future media, including reprinting /republishing this material for advertising or promotional purposes, creating new collective works, for resale or redistribution to servers or lists, or reuse of any copyrighted component of this work in other works.; IECON 2021 – 47th Annual Conference of the IEEE Industrial Electronics Society ; Conference date: 13-10-2021 Through 16-10-2021",

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Feng, Z , Pena Alzola, R , Seisopoulos, P, Syed, MH, Guillo-Sansano, E, Norman, P & Burt, G 2021, Interface compensation for more accurate power transfer and signal synchronization within power hardware-in-the-loop simulation. in IECON 2021 – 47th Annual Conference of the IEEE Industrial Electronics Society. IECON Proceedings (Industrial Electronics Conference), vol. 2021-October, IEEE, Piscataway, N.J., IECON 2021 – 47th Annual Conference of the IEEE Industrial Electronics Society, Toronto, Canada, 13/10/21. https://doi.org/10.1109/IECON48115.2021.9589158

Interface compensation for more accurate power transfer and signal synchronization within power hardware-in-the-loop simulation. / Feng, Zhiwang ; Pena Alzola, Rafael ; Seisopoulos, Paschalis et al.

IECON 2021 – 47th Annual Conference of the IEEE Industrial Electronics Society. Piscataway, N.J. : IEEE, 2021. (IECON Proceedings (Industrial Electronics Conference); Vol. 2021-October).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution book

TY - GEN

T1 - Interface compensation for more accurate power transfer and signal synchronization within power hardware-in-the-loop simulation

AU - Feng, Zhiwang

AU - Pena Alzola, Rafael

AU - Seisopoulos, Paschalis

AU - Syed, Mazheruddin Hussain

AU - Guillo-Sansano, Efren

AU - Norman, Patrick

AU - Burt, Graeme

N1 - © 2021 IEEE. Personal use of this material is permitted. Permission from IEEE must be obtained for all other uses, in any current or future media, including reprinting /republishing this material for advertising or promotional purposes, creating new collective works, for resale or redistribution to servers or lists, or reuse of any copyrighted component of this work in other works.

PY - 2021/11/13

Y1 - 2021/11/13

N2 - Power hardware-in-the-loop (PHIL) simulation leverages the real-time emulation of a large-scale complex power system, while also enabling the in-depth investigation of novel actual power components and their interactions with the emulated power grid. The dynamics and non-ideal characteristics (e.g., time delay, non-unity gain, and limited bandwidth) of the power interface result in stability and accuracy issues within the PHIL closed-loop simulations. In this paper, a compensation method is proposed to compensate for the non-ideal power interface by maximizing its bandwidth, maintaining its unity-gain characteristic, and compensating for its phase-shift over the frequencies of interest. The accuracy of power signals synchronization and the transparency of power transfer within the PHIL configuration are assessed by employing the error metrics. In conjunction with the frequency-domain stability analysis and the time-domain simulations, a case study is made to validate the proposed compensation method.

AB - Power hardware-in-the-loop (PHIL) simulation leverages the real-time emulation of a large-scale complex power system, while also enabling the in-depth investigation of novel actual power components and their interactions with the emulated power grid. The dynamics and non-ideal characteristics (e.g., time delay, non-unity gain, and limited bandwidth) of the power interface result in stability and accuracy issues within the PHIL closed-loop simulations. In this paper, a compensation method is proposed to compensate for the non-ideal power interface by maximizing its bandwidth, maintaining its unity-gain characteristic, and compensating for its phase-shift over the frequencies of interest. The accuracy of power signals synchronization and the transparency of power transfer within the PHIL configuration are assessed by employing the error metrics. In conjunction with the frequency-domain stability analysis and the time-domain simulations, a case study is made to validate the proposed compensation method.

KW - power hardware-in-the-loop (PHIL)

KW - power transfer

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KW - power interface compensation

KW - stability analysis

KW - accuracy assessment

U2 - 10.1109/IECON48115.2021.9589158

DO - 10.1109/IECON48115.2021.9589158

M3 - Conference contribution book

SN - 9781665402569

T3 - IECON Proceedings (Industrial Electronics Conference)

BT - IECON 2021 – 47th Annual Conference of the IEEE Industrial Electronics Society

PB - IEEE

CY - Piscataway, N.J.

T2 - IECON 2021 – 47th Annual Conference of the IEEE Industrial Electronics Society

Y2 - 13 October 2021 through 16 October 2021

ER -

Feng Z , Pena Alzola R , Seisopoulos P, Syed MH, Guillo-Sansano E, Norman P et al. Interface compensation for more accurate power transfer and signal synchronization within power hardware-in-the-loop simulation. In IECON 2021 – 47th Annual Conference of the IEEE Industrial Electronics Society. Piscataway, N.J.: IEEE. 2021. (IECON Proceedings (Industrial Electronics Conference)). Epub 2021 Oct 16. doi: 10.1109/IECON48115.2021.9589158

Interface compensation for more accurate power transfer and signal synchronization within power hardware-in-the-loop simulation

Abstract

Publication series

Conference

Keywords

Access to Document

Fingerprint

Research output

Virtual shifting impedance method for extended range high-fidelity PHIL testing

Current-type power hardware-in-the-loop interface for black-start testing of grid-forming converter

Adaptive Smith predictor for enhanced stability of power hardware-in-the-loop setups

Cite this