Improved functional simulation of dynamically reconfigurable logic

I. Robertson, J. Irvine, P. Lysaght, D. Robinson

Research output: Chapter in Book/Report/Conference proceedingChapter

5 Citations (Scopus)

Abstract

Several techniques to simulate dynamically reconfigurable logic (DRL) have been published during the last decade. These methods each have their own strengths and weaknesses, and perform well when used under particular circumstances. This paper introduces a revised version of dynamic circuit switching (DCS), a DRL simulation technique reported previously, which improves the accuracy of the simulation models and extends the range of situations to which they can be applied. The internal state of dynamic tasks that contain memory elements can change when they are reconfigured. Modelling this presents a further simulation requirement. The paper indicates how this can be achieved by including the ideas behind another simulation technique, clock morphing, in the methodology. Finally, the run-time overheads introduced by the technique are analysed.
Original languageEnglish
Title of host publicationField-Programmable Logic and Applications: Reconfigurable Computing Is Going Mainstream
PublisherSpringer
Pages152-161
Number of pages9
Volume2438
ISBN (Print)978-3-540-44108-3
Publication statusPublished - 2002

Publication series

NameLecture Notes in Computer Science
PublisherSpringer

Keywords

  • simulation
  • dynamically reconfigurable logic

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