High-speed resonant gate driver with controlled peak gate voltage for silicon carbide MOSFETs

Research output: Chapter in Book/Report/Conference proceedingConference contribution book

21 Citations (Scopus)

Abstract

Parasitic inductance in the gate path of a Silicon Carbide MOSFET places an upper limit upon the switching speeds achievable from these devices, resulting in unnecessarily high switching losses due to the introduction of damping resistance into the gate path. A method to reduce switching losses is proposed, using a resonant gate driver to absorb parasitic inductance in the gate path, enabling the gate resistor to be removed. The gate voltage is maintained at the desired level using a feedback loop. Experimental results for a 1200 V Silicon Carbide MOSFET gate driver are presented, demonstrating switching loss of 230 μJ at 800 V, 10 A. This represents a 20% reduction in switching losses in comparison to conventional gate drive methods.
Original languageEnglish
Title of host publication2012 IEEE Energy Conversion Congress and Exposition (ECCE)
Place of PublicationPiscataway, N.J.
PublisherIEEE
Pages2961-2968
Number of pages8
ISBN (Print)978-1-4673-0802-1
DOIs
Publication statusPublished - 15 Sep 2012
Event4th IEEE Energy Conversion Congress and Exposition -
Duration: 1 Sep 201230 Sep 2012

Conference

Conference4th IEEE Energy Conversion Congress and Exposition
Period1/09/1230/09/12

Keywords

  • logic gates
  • switching loss
  • wide band gap semiconductors

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