Adaptive radiotherapy is a technique intended to increase the accuracy of radiotherapy. Currently, it is not clinically feasible due to the time required to process the images of patient anatomy. Hardware acceleration of image processing algorithms may allow them to be carried out in a clinically acceptable timeframe. This paper presents the experiences encountered using high-level synthesis tools to design an accelerated segmentation algorithm for computed tomography images targeted for implementation on a System on Chip. Hardware coprocessors and their interfaces for optimal threshold generation and 3D mean filter algorithms were synthesised from C++ functions. Hardware acceleration significantly outperformed the software only implementation. The high-level synthesis tools allowed the rapid exploration of different design options. However, hardware design knowledge was still necessary in order to interpret the results effectively.
|Title of host publication||2016 26th International Conference on Field Programmable Logic and Applications (FPL), 2016|
|Place of Publication||Lausanne|
|Number of pages||2|
|Publication status||Published - 29 Sep 2016|
|Event||26th International Conference on Field-Programmable Logic and Applications - SwissTech Convention Centre, Lausanne, Switzerland|
Duration: 30 Aug 2016 → 1 Sep 2016
|Conference||26th International Conference on Field-Programmable Logic and Applications|
|Abbreviated title||FPL 2016|
|Period||30/08/16 → 1/09/16|
- high level synthesis
- system on chip
- medical imaging
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