Hardware-in-the-loop tests and analysis of HVDC system's impact on distance protection performance

This paper presents comprehensive and realistic Hardware-In-the-Loop (HIL) tests of a physical relay and analysis of the test results for evaluating the impact of HVDC systems (and converters in general) on the operation of distance protection. In the established HIL test configuration, simulated voltage and current waveforms from a Real Time Digital Simulator (RTDS) are injected to the relays via an analogue amplifier, and the relays' tripping signals are input back to the RTDS to monitor their tripping actions. During the HIL tests, the relay is configured with both MHO and QUAD characteristics, and it is tested under a wide range of system operating conditions with different fault levels, fault types and locations, and HVDC control strategies. The test results show that the integration of the HVDC system could lead to the compromised distance protection performance, including failed tripping, delayed tripping and zone discrimination issues. Detailed analysis of the test results is presented, and it is found that the main causes of the identified issues include: 1) under-reach/over-reach problem owing to the angle difference of currents from local and remote ends in the event of resistive faults; 2) inaccurate impedance measurement problem due to identical faulty phase currents during phase-to-phase faults with the constant reactive power control of HVDC system; 3) phase selection issues owing to the abnormal increase of the superimposed currents during phase-earth fault with balanced current control (i.e., only injecting positive sequence current without any negative sequence component) of HVDC system. The results and analysis presented in this paper will not only offer valuable evidence-based insights to understand the challenges of distance protection in future converter-dominated networks, but also provide a useful reference, informing future research and development to address these identified issues.