FPGA implementation of a video-rate fluorescence lifetime imaging system with a 32x32 CMOS single-photon avalanche diode array

Day-Uei Li, Richard Walker, Justin Richardson, Bruce R. Rae, Alex Buts, David Renshaw, Robert Henderson

Research output: Chapter in Book/Report/Conference proceedingConference contribution book

6 Citations (Scopus)

Abstract

A new integration based fluorescence lifetime imaging microscopy (FLIM) called IEM has been proposed to implement lifetime calculations [1]. A real-time hardware implementation of this IEM FLIM algorithm suitable for a single photon avalanche diode (SPAD) array in 0.13µm CMOS technology is now implemented on FPGA. A widefield microscope was adapted to accommodate the array and test it on biological applications. Video-rate fluorescence lifetime imaging has been achieved, by performing parallel 32×32 lifetime calculations, realizing the first, compact, and low-cost FLIM camera.
Original languageEnglish
Title of host publicationIEEE International Symposium on Circuits and Systems (ISCAS)
Place of PublicationPiscataway
PublisherIEEE
Pages3082-3085
Number of pages4
ISBN (Print)9781424438273
DOIs
Publication statusPublished - 26 Jun 2009
Event IEEE International Symposium on Circuits and Systems, 2009 - Taipei International Convention Center, Taipei, Taiwan
Duration: 24 May 200927 May 2009

Publication series

Name
ISSN (Print)0271-4302
ISSN (Electronic)2158-1525

Conference

Conference IEEE International Symposium on Circuits and Systems, 2009
Abbreviated titleISCAS 2009
Country/TerritoryTaiwan
CityTaipei
Period24/05/0927/05/09

Keywords

  • field programmable gate arrays
  • fluorescence
  • diodes
  • microscopy
  • CMOS technology
  • hardware
  • photonics
  • adaptive arrays
  • testing
  • cameras

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