FPGA implementation of a TVWS up- and down converter using non-power-of-two FFT modulated filter banks

Vianney Anis, Jincheng Guo, Stephan Weiss, Louise H. Crockett

Research output: Contribution to conferencePaper

8 Downloads (Pure)

Abstract

This paper addresses an oversampled filter bank (OSFB) approach to up- and down-convert any or all of the 40 channels in the United Kingdom's TV white space (TVWS). We particularly consider the use of non-power-of-two fast Fourier transforms (FFTs), which provides a greater choice of design parameters over existing OSFB implementations. Using a field-programmable gate array (FPGA) software defined radio (SDR) platform, we compare two different 40-point FFT-based implementations of the system - one fully parallelised, one serialised- with an existing design using a radix-two 64-point FFT in terms of implementation cost and power consumption.
Original languageEnglish
Number of pages5
Publication statusPublished - 2 Sep 2019
Event27th European Signal Processing Conference - A Coruna, Spain
Duration: 2 Sep 20196 Sep 2019
http://eusipco2019.org/

Conference

Conference27th European Signal Processing Conference
Abbreviated titleEUSIPCO 2019
CountrySpain
CityA Coruna
Period2/09/196/09/19
Internet address

Keywords

  • TV white space
  • field programmable gate array
  • fast fourier transform

Fingerprint Dive into the research topics of 'FPGA implementation of a TVWS up- and down converter using non-power-of-two FFT modulated filter banks'. Together they form a unique fingerprint.

  • Projects

    Cite this

    Anis, V., Guo, J., Weiss, S., & Crockett, L. H. (2019). FPGA implementation of a TVWS up- and down converter using non-power-of-two FFT modulated filter banks. Paper presented at 27th European Signal Processing Conference, A Coruna, Spain.