FPGA implementation of a memory-efficient Hough Parameter Space for the detection of lines

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Abstract

The Line Hough Transform (LHT) is a robust and accurate line detection algorithm, useful for applications such as lane detection in Advanced Driver Assistance Systems. For real-time implementation, the LHT is demanding in terms of computation and memory, and hence Field Programmable Gate Arrays (FPGAs) are often deployed. However, many small FPGAs are incapable of implementing the LHT due to the large memory requirement of the Hough Parameter Space (HPS). This paper presents a memory-efficient architecture of the LHT named the Angular Regions - Line Hough Transform (AR-LHT). We present a suitable FPGA implementation of the AR-LHT and provide a performance and resource analysis after targeting a Xilinx xc7z010-1 device. Results demonstrate that, for an image of 1024x1024 pixels, approximately 48% less memory is used than the Standard LHT. The FPGA architecture is capable of processing a single image in 9.03ms.
Original languageEnglish
Title of host publication2018 IEEE International Symposium on Circuits and Systems (ISCAS)
Place of PublicationPiscataway, N.J.
PublisherIEEE
Number of pages5
ISBN (Print)978-1-5386-4882-7
DOIs
Publication statusPublished - 4 May 2018
EventIEEE International Symposium on Circuits & Systems 2018 - Firenze Fiera Congress & Exhibition Center, Florence, Italy
Duration: 27 May 201830 May 2018
Conference number: 41626
http://www.iscas2018.org/

Conference

ConferenceIEEE International Symposium on Circuits & Systems 2018
Abbreviated titleISCAS 2018
CountryItaly
CityFlorence
Period27/05/1830/05/18
Internet address

Keywords

  • FPGA
  • Hough transform
  • line detection
  • memory-efficient
  • computer vision
  • angular regions

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