FPGA implementation of a cyclostationary detector for OFDM signals

Research output: Contribution to conferencePaper

3 Citations (Scopus)

Abstract

Due to the ubiquity of Orthogonal Frequency Division Multiplexing (OFDM) based communications standards such as IEEE 802.11 a/g/n and 3GPP Long Term Evolution (LTE), a growing interest has developed in techniques for reliably detecting the presence of these signals in dynamic radio systems. A popular approach for detection is to exploit the cyclostationary nature of OFDM communications signals. In this paper, we focus on a frequency domain cyclostationary detection algorithm first introduced by Giannakis and Dandawate and study its performance in detecting IEEE 802.11a OFDM signals in the presence of practical radio impairments such as Carrier Frequency offset (CFO), Phase Noise, I/Q Imbalance, Multipath Fading and DC offset. We then present a hardware implementation of this algorithm developed using MathWorks HDL Coder and provide implementation results after targeting to a Xilinx 7 Series FPGA device.

Conference

ConferenceThe 2016 European Signal Processing Conference
Abbreviated titleEUSIPCO 2016
CountryHungary
CityBudapest
Period29/08/162/09/16
Internet address

Fingerprint

Orthogonal frequency division multiplexing
Field programmable gate arrays (FPGA)
Detectors
Long Term Evolution (LTE)
Multipath fading
Radio systems
Communication
Phase noise
Hardware

Keywords

  • OFDM
  • cyclostationary detection
  • HDL Coder
  • FPGA

Cite this

Allan, D., Crockett, L., Weiss, S., Stuart , K., & Stewart, R. W. (2016). FPGA implementation of a cyclostationary detector for OFDM signals. Paper presented at The 2016 European Signal Processing Conference , Budapest, Hungary.
Allan, Douglas ; Crockett, Louise ; Weiss, Stephan ; Stuart , Kenneth ; Stewart, Robert W. / FPGA implementation of a cyclostationary detector for OFDM signals. Paper presented at The 2016 European Signal Processing Conference , Budapest, Hungary.5 p.
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title = "FPGA implementation of a cyclostationary detector for OFDM signals",
abstract = "Due to the ubiquity of Orthogonal Frequency Division Multiplexing (OFDM) based communications standards such as IEEE 802.11 a/g/n and 3GPP Long Term Evolution (LTE), a growing interest has developed in techniques for reliably detecting the presence of these signals in dynamic radio systems. A popular approach for detection is to exploit the cyclostationary nature of OFDM communications signals. In this paper, we focus on a frequency domain cyclostationary detection algorithm first introduced by Giannakis and Dandawate and study its performance in detecting IEEE 802.11a OFDM signals in the presence of practical radio impairments such as Carrier Frequency offset (CFO), Phase Noise, I/Q Imbalance, Multipath Fading and DC offset. We then present a hardware implementation of this algorithm developed using MathWorks HDL Coder and provide implementation results after targeting to a Xilinx 7 Series FPGA device.",
keywords = "OFDM, cyclostationary detection, HDL Coder, FPGA",
author = "Douglas Allan and Louise Crockett and Stephan Weiss and Kenneth Stuart and Stewart, {Robert W.}",
note = "First published in the Proceedings of the 24th European Signal Processing Conference (EUSIPCO-2016) in 2016, published by EURASIP.; The 2016 European Signal Processing Conference , EUSIPCO 2016 ; Conference date: 29-08-2016 Through 02-09-2016",
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Allan, D, Crockett, L, Weiss, S, Stuart , K & Stewart, RW 2016, 'FPGA implementation of a cyclostationary detector for OFDM signals' Paper presented at The 2016 European Signal Processing Conference , Budapest, Hungary, 29/08/16 - 2/09/16, .

FPGA implementation of a cyclostationary detector for OFDM signals. / Allan, Douglas; Crockett, Louise; Weiss, Stephan; Stuart , Kenneth; Stewart, Robert W.

2016. Paper presented at The 2016 European Signal Processing Conference , Budapest, Hungary.

Research output: Contribution to conferencePaper

TY - CONF

T1 - FPGA implementation of a cyclostationary detector for OFDM signals

AU - Allan, Douglas

AU - Crockett, Louise

AU - Weiss, Stephan

AU - Stuart , Kenneth

AU - Stewart, Robert W.

N1 - First published in the Proceedings of the 24th European Signal Processing Conference (EUSIPCO-2016) in 2016, published by EURASIP.

PY - 2016/9/7

Y1 - 2016/9/7

N2 - Due to the ubiquity of Orthogonal Frequency Division Multiplexing (OFDM) based communications standards such as IEEE 802.11 a/g/n and 3GPP Long Term Evolution (LTE), a growing interest has developed in techniques for reliably detecting the presence of these signals in dynamic radio systems. A popular approach for detection is to exploit the cyclostationary nature of OFDM communications signals. In this paper, we focus on a frequency domain cyclostationary detection algorithm first introduced by Giannakis and Dandawate and study its performance in detecting IEEE 802.11a OFDM signals in the presence of practical radio impairments such as Carrier Frequency offset (CFO), Phase Noise, I/Q Imbalance, Multipath Fading and DC offset. We then present a hardware implementation of this algorithm developed using MathWorks HDL Coder and provide implementation results after targeting to a Xilinx 7 Series FPGA device.

AB - Due to the ubiquity of Orthogonal Frequency Division Multiplexing (OFDM) based communications standards such as IEEE 802.11 a/g/n and 3GPP Long Term Evolution (LTE), a growing interest has developed in techniques for reliably detecting the presence of these signals in dynamic radio systems. A popular approach for detection is to exploit the cyclostationary nature of OFDM communications signals. In this paper, we focus on a frequency domain cyclostationary detection algorithm first introduced by Giannakis and Dandawate and study its performance in detecting IEEE 802.11a OFDM signals in the presence of practical radio impairments such as Carrier Frequency offset (CFO), Phase Noise, I/Q Imbalance, Multipath Fading and DC offset. We then present a hardware implementation of this algorithm developed using MathWorks HDL Coder and provide implementation results after targeting to a Xilinx 7 Series FPGA device.

KW - OFDM

KW - cyclostationary detection

KW - HDL Coder

KW - FPGA

UR - http://www.eusipco2016.org/

M3 - Paper

ER -

Allan D, Crockett L, Weiss S, Stuart K, Stewart RW. FPGA implementation of a cyclostationary detector for OFDM signals. 2016. Paper presented at The 2016 European Signal Processing Conference , Budapest, Hungary.