Abstract
This paper presents a flexible FPGA digital beamforming architecture to steer an array for wideband radio frequency signals. The architecture combines True Time-Delay (TTD) units and phase-shifting to beamform at digital baseband. The TTDs utilize low order, coefficient-symmetric Farrow structures to rapidly and flexibly adjust fractional sample delays applied to wideband signals with minimal FPGA resources. Bandpass sampling is employed to further reduce resource and power consumption. The designed Farrow structure’s group delay and magnitude characteristics are evaluated. Measured beam patterns are demonstrated through simulation of the proposed FPGA receive array using fixed-point arithmetic. The multiplier utilization of the proposed system is estimated and compared with the literature. Promising results open discussions to hardening Farrow structure cores on FPGAs to serve multiple signal processing techniques required in future communications systems without consuming programmable logic fabric.
| Original language | English |
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| Number of pages | 6 |
| Publication status | Accepted/In press - 22 Apr 2025 |
| Event | 30th IEEE Symposium on Computers and Communications (ISCC) - Bologna, Italy, Bologna, Italy Duration: 2 Jul 2025 → 5 Jul 2025 Conference number: 30th https://ieee-iscc.computer.org/2025/ |
Conference
| Conference | 30th IEEE Symposium on Computers and Communications (ISCC) |
|---|---|
| Abbreviated title | IEEE ISCC 2025 |
| Country/Territory | Italy |
| City | Bologna |
| Period | 2/07/25 → 5/07/25 |
| Internet address |
Keywords
- wideband beamforming
- farrow structure
- FPGA
- true time-delay