Abstract
Future devices operating in the TV white space (TVWS) spectrum will require to access different bands at different locations and times in order to avoid interference to incumbent users, requiring agility and sufficient spectral masks to satisfy regulators. Further, with very high-speed ADCs and DACs becoming reality, the purpose of this paper is to present a transceiver front-end capable of simultaneously up- and downconverting a significant portion of the UHF band. The proposed approach takes a two-stage filter-bank conversion for implementation on state-of-the-art FPGAs. We present three different parameterisations, which are compatible with the 40 TVWS channels between 470 and 790MHz in Europe, and compare them in terms of complexity and latency.
Original language | English |
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Title of host publication | 2012 proceedings of the 20th european signal processing conference (EUSIPCO) |
Place of Publication | New York |
Publisher | IEEE |
Pages | 1079-1083 |
Number of pages | 4 |
ISBN (Print) | 9781467310680 |
Publication status | Published - Aug 2012 |
Event | 20th European Signal Processing Conference - Bukarest, Romania Duration: 27 Sept 2012 → 1 Oct 2012 |
Conference
Conference | 20th European Signal Processing Conference |
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Country/Territory | Romania |
City | Bukarest |
Period | 27/09/12 → 1/10/12 |
Keywords
- efficient
- TV white space
- filter bank transceiver
- TVWS