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Efficient system for bulk characterization of cryogenic CMOS components

Jonathan Eastoe, Grayson M. Noah, Debargha Dutta, Alessandro Rossi, Jonathan D. Fletcher, Alberto Gomez-Saiz

Research output: Working paper/Preprint/Pre-registrationWorking Paper/Preprint

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Abstract

Semiconductor integrated circuits operated at cryogenic temperature will play an essential role in quantum computing architectures. These can offer equivalent or superior performance to their room-temperature counterparts while enabling a scaling up of the total number of qubits under control. Silicon integrated circuits can be operated at a temperature stage of a cryogenic system where cooling power is sufficient (∼3.5+ K) to allow for analog signal chain components (e.g. amplifiers and mixers), local signal synthesis, signal digitization, and control logic. A critical stage in cryo-electronics development is the characterization of individual transistor devices in a particular technology node at cryogenic temperatures. This data enables the creation of a process design kit (PDK) to model devices and simulate integrated circuits operating well below the minimum standard temperature ranges covered by foundry-released models (e.g. -55 °C). Here, an efficient approach to the characterization of large numbers of components at cryogenic temperature is reported. We developed a system to perform DC measurements with Kelvin sense of individual transistors at 4.2 K using integrated on-die multiplexers, enabling bulk characterization of thousands of devices with no physical change to the measurement setup.
Original languageEnglish
Place of PublicationIthaca, NY
Number of pages9
DOIs
Publication statusPublished - 17 Apr 2024

Funding

We acknowledge support from the NPL Quantum Technologies program and the ISCF project Altnaharra (Innovate UK ID 10006186). A. R. acknowledges support from a UKRI Future Leaders Fellowship (MR/T041110/1).

Keywords

  • semiconductor integrated circuits
  • quantum computing
  • cryo-electronics
  • CMOS

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