Abstract
STAN is a Graphplan-based planner, so-called because it uses a variety of STate ANalysis techniques to enhance its performance. STAN competed in the AIPS-98 planning competition where it compared well with the other competitors in terms of speed, finding solutions fastest to many of the problems posed. Although the domain analysis techniques STAN exploits are an important factor in its overall performance, we believe that the speed at which STAN solved the competition problems is largely due to the implementation of its plan graph. The implementation is based on two insights: that many of the graph construction operations can be implemented as bit-level logical operations on bit vectors, and that the graph should not be explicitly constructed beyond the fix point. This paper describes the implementation of STAN's plan graph and provides experimental results which demonstrate the circumstances under which advantages can be obtained from using this implementation.
Original language | English |
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Pages (from-to) | 87-115 |
Number of pages | 28 |
Journal | Journal of Artificial Intelligence Research |
Volume | 10 |
Issue number | 1999 |
DOIs | |
Publication status | Published - 1 Feb 1999 |
Keywords
- STAN
- Graphplan-based planner
- domain analysis techniques
- bit-level logical operations on bit vectors