Effect of SiNx gate dielectric deposition power and temperature on a-Si:H TFT stability

Alex Z. Kattamis*, Kunigunde H. Cherenack, Bahman Hekmatshoar, I. Chun Cheng, Helena Gleskova, James C. Sturm, Sigard Wagner

*Corresponding author for this work

Research output: Contribution to journalArticlepeer-review

21 Citations (Scopus)

Abstract

The stability of thin-film transistors (TFTs) of hydrogenated amorphous-silicon (a-Si:H) against gate-bias stress is improved by raising the deposition power and temperature of the silicon nitride gate dielectric. We studied the effects of power density between 22 and 110 mW/cm2 and temperature between 150C and 300C. The time needed to shift the threshold voltage by 2 V varies by a factor of 12 between low power and low temperature, and high power and high temperature. These results highlight the importance of fabricating a-Si:H TFTs on flexible plastic with the SiNx gate dielectric deposited at the highest possible power and temperature.
Original languageEnglish
Pages (from-to)606-608
Number of pages3
JournalIEEE Electron Device Letters
Volume28
Issue number7
DOIs
Publication statusPublished - Jul 2007

Keywords

  • amorphous-silicon (a-Si:H)
  • electrical stability
  • thin-film transistor
  • plasma stability
  • plasma temperature

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