DSPWM multilevel technique of 27‐levels based on FPGA for the cascaded DC/AC power converter operation

N.M. Salgado-Herrera, J. Aurelio Medina-Ríos, Roberto Tapia‐Sánchez, Olimpo Anaya-Lara, Ramon Rodríguez‐Rodríguez

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4 Citations (Scopus)
14 Downloads (Pure)

Abstract

In this paper, a digital sinusoidal pulse width modulation (DSPWM) multilevel technique of 27-levels based on field programmable gate array (FPGA) is introduced, as an alternative to control of the direct current/alternating current multilevel power converters. The implementation of this technique with an FPGA XC3S500E model is achieved in the Xilinx Spartan-3E FPGA platforms. An experimental prototype is implemented by 3-cascaded H-bridges controlled by the DSPWM multilevel technique, generating high efficiency, low cost, and lower harmonic content. The efficiency of the DSPWM multilevel technique using R, RL, RC, and RLC loads connected to the power network is verified.
Original languageEnglish
Article numbere2479
Number of pages15
JournalInternational Transactions on Electrical Energy Systems
Volume28
Issue number1
Early online date9 Nov 2017
DOIs
Publication statusPublished - 31 Jan 2018

Keywords

  • cascaded DC/AC converters
  • DSPWM
  • FPGA
  • multilevel H‐bridges

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