TY - JOUR
T1 - Design and application of superconducting fault current limiter in a multiterminal HVDC system
AU - Yang, Qingqing
AU - Le Blond, Simon
AU - Liang, Fei
AU - Yuan, Weijia
AU - Zhang, Min
AU - Li, Jianwei
N1 - © 2018 IEEE. Personal use of this material is permitted. Permission from IEEE must be obtained for all other uses, in any current or future media, including reprinting/republishing this material for advertising or promotional purposes, creating new collective works, for resale or redistribution to servers or lists, or reuse of any copyrighted component of this work in other works.
PY - 2017/6/30
Y1 - 2017/6/30
N2 - Voltage source converter based HVdc (VSC-HVdc) systems are prone to high short-circuit current during transmission line faults. The situation for multiterminal HVdc (MTDC) systems is worse. The characteristics of superconducting material are ideal to limit the fault current in HVdc systems. This paper presents a novel use of the resistive type of superconducting fault current limiter (SFCL) in the MTdc network with the function of limiting the high current. The working principles of fault current limiter and a three-terminal HVdc system are modeled in detail using PSCAD/EMTDC software. The hybrid operation of the SFCL in the three-terminal HVdc system is tested in this paper for the fault response of the MTdc system. The performances of SFCL under different fault conditions are analyzed. The simulation results show that the fault current is effectively restrained and the SFCL can act as an efficient protective device for VSC-based multiterminal HVdc systems.
AB - Voltage source converter based HVdc (VSC-HVdc) systems are prone to high short-circuit current during transmission line faults. The situation for multiterminal HVdc (MTDC) systems is worse. The characteristics of superconducting material are ideal to limit the fault current in HVdc systems. This paper presents a novel use of the resistive type of superconducting fault current limiter (SFCL) in the MTdc network with the function of limiting the high current. The working principles of fault current limiter and a three-terminal HVdc system are modeled in detail using PSCAD/EMTDC software. The hybrid operation of the SFCL in the three-terminal HVdc system is tested in this paper for the fault response of the MTdc system. The performances of SFCL under different fault conditions are analyzed. The simulation results show that the fault current is effectively restrained and the SFCL can act as an efficient protective device for VSC-based multiterminal HVdc systems.
KW - DC line fault
KW - dynamic analysis
KW - multi-terminal VSC-HVDC
KW - PSCAD/EMTDC
KW - superconducting fault current limiter
UR - http://www.scopus.com/inward/record.url?scp=85017158849&partnerID=8YFLogxK
UR - https://researchportal.bath.ac.uk/en/publications/design-and-application-of-superconducting-fault-current-limiter-i
UR - https://ieeexplore.ieee.org/xpl/RecentIssue.jsp?punumber=77
U2 - 10.1109/TASC.2017.2669152
DO - 10.1109/TASC.2017.2669152
M3 - Article
AN - SCOPUS:85017158849
VL - 27
JO - IEEE Transactions on Applied Superconductivity
JF - IEEE Transactions on Applied Superconductivity
SN - 1051-8223
IS - 4
M1 - 7855643
ER -