We present a microring-based integrated router in Silicon-on-Insulator technology suitable for optical networking at chip level. The switching functionalities in a 3-channels 10 Gbit/s WDM configuration are evaluated through the BER curves. Results show, for a BER of 10-9, a maximum power penalty of 7 dB on the less performing routing path.
|Title of host publication||39th European Conference and Exhibition on Optical Communication (ECOC 2013) |
|Number of pages||3|
|Publication status||Published - 1 Dec 2013|
- 3-channel WDM configuration
- BER curves
- bit error rate performance evaluation
- microring-based integrated router