Architecture-aware synthesis of phase polynomials for NISQ devices

Arianne Meijer-van de Griend; Ross Duncan

Architecture-aware synthesis of phase polynomials for NISQ devices

Arianne Meijer-van de Griend, Ross Duncan

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Abstract

We propose a new algorithm to synthesise quantum circuits for phase polynomials, which takes into account the qubit connectivity of the quantum computer. We focus on the architectures of currently available NISQ devices. Our algorithm generates circuits with a smaller CNOT depth than the algorithms currently used in Staq and t|ket>, while improving the runtime with respect the former.

Original language	English
Journal	Electronic Proceedings in Theoretical Computer Science
Publication status	Accepted/In press - 13 Apr 2020
Event	17th International Conference on Quantum Physics and Logic - Duration: 2 Jun 2020 → 6 Jun 2020 https://www.monoidal.net/paris2020/qpl/

Keywords

quantum computing
quantum circuits
compilers

Access to Document

Griend-Duncan-EPTCS-2020-Architecture-aware-synthesis-of-phase-polynomials-for-NISQ-devicesAccepted author manuscript, 779 KB

https://doi.org/10.4204/EPTCS

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Cite this

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title = "Architecture-aware synthesis of phase polynomials for NISQ devices",

abstract = "We propose a new algorithm to synthesise quantum circuits for phase polynomials, which takes into account the qubit connectivity of the quantum computer. We focus on the architectures of currently available NISQ devices. Our algorithm generates circuits with a smaller CNOT depth than the algorithms currently used in Staq and t|ket>, while improving the runtime with respect the former. ",

keywords = "quantum computing, quantum circuits, compilers",

author = "Griend, {Arianne Meijer-van de} and Ross Duncan",

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url = "https://www.monoidal.net/paris2020/qpl/",

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AU - Duncan, Ross

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AB - We propose a new algorithm to synthesise quantum circuits for phase polynomials, which takes into account the qubit connectivity of the quantum computer. We focus on the architectures of currently available NISQ devices. Our algorithm generates circuits with a smaller CNOT depth than the algorithms currently used in Staq and t|ket>, while improving the runtime with respect the former.

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KW - compilers

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JF - Electronic Proceedings in Theoretical Computer Science

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