An SVM algorithm to balance the capacitor voltages of the three-level NPC active power filter

Huibin Zhang; S.J. Finney; A. Massoud; B.W. Williams

doi:10.1109/TPEL.2008.2002820

An SVM algorithm to balance the capacitor voltages of the three-level NPC active power filter

Huibin Zhang, S.J. Finney, A. Massoud, B.W. Williams

Electronic And Electrical Engineering

Research output: Contribution to journal › Article › peer-review

99 Citations (Scopus)

Abstract

A requirement of the three-level neutral-point-clamped voltage source inverter, with or without a separately supporting dc link, is to maintain the balance of the two dc-link capacitor voltages. In this paper, balancing of the capacitor voltages for these two dc-link voltage source possibilities is analyzed and an algorithm is proposed to independently balance the capacitor voltages. The algorithm considers the average energy effect of each vector on capacitor voltage and the necessary optimal vector state sequence in each modulation cycle. The algorithm minimizes the voltage rating overheads of the hardware, reduces the voltage ripple, and attenuates the negative effects associated with dc-link voltage oscillations.

Original language	English
Pages (from-to)	2694-2702
Number of pages	8
Journal	IEEE Transactions on Power Electronics
Volume	23
Issue number	6
DOIs	https://doi.org/10.1109/TPEL.2008.2002820
Publication status	Published - 9 Dec 2008

Keywords

capacitor voltage ripple
neutral point diode-clamped (NPC)
space vector modulation

Access to Document

10.1109/TPEL.2008.2002820

http://dx.doi.org/10.1109/TPEL.2008.2002820

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AU - Finney, S.J.

AU - Massoud, A.

AU - Williams, B.W.

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KW - space vector modulation

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