An FPGA implementation of pattern-selective pyramidal image fusion

O.N. Sims, J. Irvine

Research output: Chapter in Book/Report/Conference proceedingConference contribution book

11 Citations (Scopus)

Abstract

The aim of image fusion is to combine multiple images (from one or more sensors) into a single composite image that retains all useful data without introducing artefacts. Pattern-selective techniques attempt to identify and extract whole features in the source images to use in the composite. These techniques usually rely on multiresolution image representations such as Gaussian pyramids, which are localised in both the spatial and spatial-frequency domains, since they enable identification of features at many scales simultaneously. This paper presents an FPGA implementation of pyramidal decomposition and subsequent fusion of dual video streams. This is the first reported instance of a hardware implementation of pattern-selective pyramidal image fusion. Use of FPGA technology has enabled a design that can fuse dual video streams (greyscale VGA, 30fps) in real-time, and provides approximately 100 times speedup over a 2.8GHz Pentium-4
Original languageEnglish
Title of host publication2006 International Conference on Field Programmable Logic and Applications, Proceedings
EditorsA Koch, P Leong, A Koch
Place of PublicationNew York
PublisherIEEE
Pages709-712
Number of pages4
ISBN (Print)9781424403127
DOIs
Publication statusPublished - 16 May 2007
Event16th International Conference on Field Programmable Logic and Applications - Madrid, Spain
Duration: 28 Aug 200630 Aug 2006

Conference

Conference16th International Conference on Field Programmable Logic and Applications
Abbreviated titleFPL 2006
CountrySpain
CityMadrid
Period28/08/0630/08/06

Fingerprint

Image fusion
Field programmable gate arrays (FPGA)
Composite materials
Electric fuses
Decomposition
Hardware
Sensors

Keywords

  • field programmable gate arrays
  • image fusion
  • video streaming
  • data mining
  • feature extraction
  • image representation

Cite this

Sims, O. N., & Irvine, J. (2007). An FPGA implementation of pattern-selective pyramidal image fusion. In A. Koch, P. Leong, & A. Koch (Eds.), 2006 International Conference on Field Programmable Logic and Applications, Proceedings (pp. 709-712 ). New York: IEEE. https://doi.org/10.1109/FPL.2006.311296
Sims, O.N. ; Irvine, J. / An FPGA implementation of pattern-selective pyramidal image fusion. 2006 International Conference on Field Programmable Logic and Applications, Proceedings . editor / A Koch ; P Leong ; A Koch. New York : IEEE, 2007. pp. 709-712
@inproceedings{d95de7f36fd24172ac3abc7706c47bc3,
title = "An FPGA implementation of pattern-selective pyramidal image fusion",
abstract = "The aim of image fusion is to combine multiple images (from one or more sensors) into a single composite image that retains all useful data without introducing artefacts. Pattern-selective techniques attempt to identify and extract whole features in the source images to use in the composite. These techniques usually rely on multiresolution image representations such as Gaussian pyramids, which are localised in both the spatial and spatial-frequency domains, since they enable identification of features at many scales simultaneously. This paper presents an FPGA implementation of pyramidal decomposition and subsequent fusion of dual video streams. This is the first reported instance of a hardware implementation of pattern-selective pyramidal image fusion. Use of FPGA technology has enabled a design that can fuse dual video streams (greyscale VGA, 30fps) in real-time, and provides approximately 100 times speedup over a 2.8GHz Pentium-4",
keywords = "field programmable gate arrays, image fusion, video streaming , data mining , feature extraction , image representation",
author = "O.N. Sims and J. Irvine",
year = "2007",
month = "5",
day = "16",
doi = "10.1109/FPL.2006.311296",
language = "English",
isbn = "9781424403127",
pages = "709--712",
editor = "A Koch and P Leong and Koch, {A }",
booktitle = "2006 International Conference on Field Programmable Logic and Applications, Proceedings",
publisher = "IEEE",

}

Sims, ON & Irvine, J 2007, An FPGA implementation of pattern-selective pyramidal image fusion. in A Koch, P Leong & A Koch (eds), 2006 International Conference on Field Programmable Logic and Applications, Proceedings . IEEE, New York, pp. 709-712 , 16th International Conference on Field Programmable Logic and Applications, Madrid, Spain, 28/08/06. https://doi.org/10.1109/FPL.2006.311296

An FPGA implementation of pattern-selective pyramidal image fusion. / Sims, O.N.; Irvine, J.

2006 International Conference on Field Programmable Logic and Applications, Proceedings . ed. / A Koch; P Leong; A Koch. New York : IEEE, 2007. p. 709-712 .

Research output: Chapter in Book/Report/Conference proceedingConference contribution book

TY - GEN

T1 - An FPGA implementation of pattern-selective pyramidal image fusion

AU - Sims, O.N.

AU - Irvine, J.

PY - 2007/5/16

Y1 - 2007/5/16

N2 - The aim of image fusion is to combine multiple images (from one or more sensors) into a single composite image that retains all useful data without introducing artefacts. Pattern-selective techniques attempt to identify and extract whole features in the source images to use in the composite. These techniques usually rely on multiresolution image representations such as Gaussian pyramids, which are localised in both the spatial and spatial-frequency domains, since they enable identification of features at many scales simultaneously. This paper presents an FPGA implementation of pyramidal decomposition and subsequent fusion of dual video streams. This is the first reported instance of a hardware implementation of pattern-selective pyramidal image fusion. Use of FPGA technology has enabled a design that can fuse dual video streams (greyscale VGA, 30fps) in real-time, and provides approximately 100 times speedup over a 2.8GHz Pentium-4

AB - The aim of image fusion is to combine multiple images (from one or more sensors) into a single composite image that retains all useful data without introducing artefacts. Pattern-selective techniques attempt to identify and extract whole features in the source images to use in the composite. These techniques usually rely on multiresolution image representations such as Gaussian pyramids, which are localised in both the spatial and spatial-frequency domains, since they enable identification of features at many scales simultaneously. This paper presents an FPGA implementation of pyramidal decomposition and subsequent fusion of dual video streams. This is the first reported instance of a hardware implementation of pattern-selective pyramidal image fusion. Use of FPGA technology has enabled a design that can fuse dual video streams (greyscale VGA, 30fps) in real-time, and provides approximately 100 times speedup over a 2.8GHz Pentium-4

KW - field programmable gate arrays

KW - image fusion

KW - video streaming

KW - data mining

KW - feature extraction

KW - image representation

U2 - 10.1109/FPL.2006.311296

DO - 10.1109/FPL.2006.311296

M3 - Conference contribution book

SN - 9781424403127

SP - 709

EP - 712

BT - 2006 International Conference on Field Programmable Logic and Applications, Proceedings

A2 - Koch, A

A2 - Leong, P

A2 - Koch, A

PB - IEEE

CY - New York

ER -

Sims ON, Irvine J. An FPGA implementation of pattern-selective pyramidal image fusion. In Koch A, Leong P, Koch A, editors, 2006 International Conference on Field Programmable Logic and Applications, Proceedings . New York: IEEE. 2007. p. 709-712 https://doi.org/10.1109/FPL.2006.311296