An atomistic simulation investigation on chip related phenomena in nanometric cutting of single crystal silicon at elevated temperatures

Saeed Zare Chavoshi, Xichun Luo

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25 Citations (Scopus)

Abstract

Nanometric cutting of single crystal silicon on different crystal orientations and at a wide range of temperatures (300-1500 K) was studied through molecular dynamics (MD) simulations using two sorts of interatomic potentials, an analytical bond order potential (ABOP) and a modified version of Tersoff potential, so as to explore the cutting chip characteristics and chip formation mechanisms. Smaller released thermal energy and larger values of chip ratio (ratio of the uncut chip thickness to the cut chip thickness) as well as shear plane angle were obtained when cutting was performed at higher temperatures or on the (1 1 1) crystal plane, implying an enhancement in machinability of silicon. Nonetheless, the subsurface deformation depth was observed to become deeper under the aforementioned conditions. Further analysis revealed a higher number of atoms in the chip when cutting was implemented on the (1 1 0) crystal plane, attributable to the lower position of the stagnation region which triggered less ploughing action of the tool on the silicon substrate. Regardless of temperature of the substrate the minimum chip velocity angle was found while cutting the (1 1 1) crystal plane of silicon substrate whereas the maximum chip velocity angle appeared on the (1 1 0) surface. A discrepancy between the two potential functions in predicting the chip velocity angle was observed at high temperature of 1500 K, resulting from the overestimated phase instability and entirely molten temperatures of silicon by the ABOP function. Another key observation was that the resultant force exerted by the rake face of the tool on the chip was found to decrease by 24% when cutting the (1 1 1) surface at 1173 K compared to that at room temperature. Besides, smaller resultant force, friction coefficient at the tool/chip interface and chip temperature was witnessed on the (1 1 1) crystal plane, as opposed to the other orientations.

LanguageEnglish
Pages1-10
Number of pages10
JournalComputational Materials Science
Volume113
Early online date30 Nov 2015
DOIs
Publication statusPublished - 15 Feb 2016

Fingerprint

Atomistic Simulation
Silicon
Single Crystal
Chip
chips
Single crystals
single crystals
silicon
simulation
Crystals
Crystal
Temperature
temperature
Crystal orientation
Substrates
Angle
crystals
Substrate
Potential Function
Machinability

Keywords

  • cutting chip
  • elevated temperatures
  • molecular dynamics
  • nanometric cutting
  • single crystal silicon

Cite this

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title = "An atomistic simulation investigation on chip related phenomena in nanometric cutting of single crystal silicon at elevated temperatures",
abstract = "Nanometric cutting of single crystal silicon on different crystal orientations and at a wide range of temperatures (300-1500 K) was studied through molecular dynamics (MD) simulations using two sorts of interatomic potentials, an analytical bond order potential (ABOP) and a modified version of Tersoff potential, so as to explore the cutting chip characteristics and chip formation mechanisms. Smaller released thermal energy and larger values of chip ratio (ratio of the uncut chip thickness to the cut chip thickness) as well as shear plane angle were obtained when cutting was performed at higher temperatures or on the (1 1 1) crystal plane, implying an enhancement in machinability of silicon. Nonetheless, the subsurface deformation depth was observed to become deeper under the aforementioned conditions. Further analysis revealed a higher number of atoms in the chip when cutting was implemented on the (1 1 0) crystal plane, attributable to the lower position of the stagnation region which triggered less ploughing action of the tool on the silicon substrate. Regardless of temperature of the substrate the minimum chip velocity angle was found while cutting the (1 1 1) crystal plane of silicon substrate whereas the maximum chip velocity angle appeared on the (1 1 0) surface. A discrepancy between the two potential functions in predicting the chip velocity angle was observed at high temperature of 1500 K, resulting from the overestimated phase instability and entirely molten temperatures of silicon by the ABOP function. Another key observation was that the resultant force exerted by the rake face of the tool on the chip was found to decrease by 24{\%} when cutting the (1 1 1) surface at 1173 K compared to that at room temperature. Besides, smaller resultant force, friction coefficient at the tool/chip interface and chip temperature was witnessed on the (1 1 1) crystal plane, as opposed to the other orientations.",
keywords = "cutting chip, elevated temperatures, molecular dynamics, nanometric cutting, single crystal silicon",
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AU - Chavoshi, Saeed Zare

AU - Luo, Xichun

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N2 - Nanometric cutting of single crystal silicon on different crystal orientations and at a wide range of temperatures (300-1500 K) was studied through molecular dynamics (MD) simulations using two sorts of interatomic potentials, an analytical bond order potential (ABOP) and a modified version of Tersoff potential, so as to explore the cutting chip characteristics and chip formation mechanisms. Smaller released thermal energy and larger values of chip ratio (ratio of the uncut chip thickness to the cut chip thickness) as well as shear plane angle were obtained when cutting was performed at higher temperatures or on the (1 1 1) crystal plane, implying an enhancement in machinability of silicon. Nonetheless, the subsurface deformation depth was observed to become deeper under the aforementioned conditions. Further analysis revealed a higher number of atoms in the chip when cutting was implemented on the (1 1 0) crystal plane, attributable to the lower position of the stagnation region which triggered less ploughing action of the tool on the silicon substrate. Regardless of temperature of the substrate the minimum chip velocity angle was found while cutting the (1 1 1) crystal plane of silicon substrate whereas the maximum chip velocity angle appeared on the (1 1 0) surface. A discrepancy between the two potential functions in predicting the chip velocity angle was observed at high temperature of 1500 K, resulting from the overestimated phase instability and entirely molten temperatures of silicon by the ABOP function. Another key observation was that the resultant force exerted by the rake face of the tool on the chip was found to decrease by 24% when cutting the (1 1 1) surface at 1173 K compared to that at room temperature. Besides, smaller resultant force, friction coefficient at the tool/chip interface and chip temperature was witnessed on the (1 1 1) crystal plane, as opposed to the other orientations.

AB - Nanometric cutting of single crystal silicon on different crystal orientations and at a wide range of temperatures (300-1500 K) was studied through molecular dynamics (MD) simulations using two sorts of interatomic potentials, an analytical bond order potential (ABOP) and a modified version of Tersoff potential, so as to explore the cutting chip characteristics and chip formation mechanisms. Smaller released thermal energy and larger values of chip ratio (ratio of the uncut chip thickness to the cut chip thickness) as well as shear plane angle were obtained when cutting was performed at higher temperatures or on the (1 1 1) crystal plane, implying an enhancement in machinability of silicon. Nonetheless, the subsurface deformation depth was observed to become deeper under the aforementioned conditions. Further analysis revealed a higher number of atoms in the chip when cutting was implemented on the (1 1 0) crystal plane, attributable to the lower position of the stagnation region which triggered less ploughing action of the tool on the silicon substrate. Regardless of temperature of the substrate the minimum chip velocity angle was found while cutting the (1 1 1) crystal plane of silicon substrate whereas the maximum chip velocity angle appeared on the (1 1 0) surface. A discrepancy between the two potential functions in predicting the chip velocity angle was observed at high temperature of 1500 K, resulting from the overestimated phase instability and entirely molten temperatures of silicon by the ABOP function. Another key observation was that the resultant force exerted by the rake face of the tool on the chip was found to decrease by 24% when cutting the (1 1 1) surface at 1173 K compared to that at room temperature. Besides, smaller resultant force, friction coefficient at the tool/chip interface and chip temperature was witnessed on the (1 1 1) crystal plane, as opposed to the other orientations.

KW - cutting chip

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