Active matrix thin-film transistor array backplane: patent application

C. Forbes (Inventor), A. Gelbman (Inventor), H. Gleskova (Inventor), C. Turner (Inventor), S. Wagner (Inventor)

Research output: Patent

Abstract

A thin film transistor array fabricated on a polyimide substrate forms a backplane for an electronic display. The thin film transistor array incorporate gate electrodes, a gate insulating layer (44), semiconducting channel layers (50) deposited on top of the gate insulating layer (44), a source electrode (60), a drain electrode (60) and a contact layer (52) beneath each of the source and drain electrodes (60) and in contact with at least the channel layer (50). An insulating encapsulation layer (70) is positioned on the channel layer (50). The layers are deposited onto the polyimide substrate (32) using PECVD and etched using photolithography to form the backplane.
LanguageEnglish
Patent numberWO03046964 A1
IPC7C 09K 19/02 B
Publication statusPublished - 5 Jun 2003

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patent applications
transistors
matrices
thin films
electrodes
polyimides
photolithography

Keywords

  • thin film
  • polymide substrate
  • backplane
  • gate electrodes

Cite this

Forbes, C., Gelbman, A., Gleskova, H., Turner, C., & Wagner, S. (2003). IPC No. 7C 09K 19/02 B. Active matrix thin-film transistor array backplane: patent application. (Patent No. WO03046964 A1).
Forbes, C. (Inventor) ; Gelbman, A. (Inventor) ; Gleskova, H. (Inventor) ; Turner, C. (Inventor) ; Wagner, S. (Inventor). / Active matrix thin-film transistor array backplane : patent application. IPC No.: 7C 09K 19/02 B. Patent No.: WO03046964 A1.
@misc{2e92843894004a10ab3aa63c9a4805b3,
title = "Active matrix thin-film transistor array backplane: patent application",
abstract = "A thin film transistor array fabricated on a polyimide substrate forms a backplane for an electronic display. The thin film transistor array incorporate gate electrodes, a gate insulating layer (44), semiconducting channel layers (50) deposited on top of the gate insulating layer (44), a source electrode (60), a drain electrode (60) and a contact layer (52) beneath each of the source and drain electrodes (60) and in contact with at least the channel layer (50). An insulating encapsulation layer (70) is positioned on the channel layer (50). The layers are deposited onto the polyimide substrate (32) using PECVD and etched using photolithography to form the backplane.",
keywords = "thin film, polymide substrate, backplane, gate electrodes",
author = "C. Forbes and A. Gelbman and H. Gleskova and C. Turner and S. Wagner",
year = "2003",
month = "6",
day = "5",
language = "English",
type = "Patent",
note = "WO03046964 A1; 7C 09K 19/02 B",

}

Forbes, C, Gelbman, A, Gleskova, H, Turner, C & Wagner, S 2003, Active matrix thin-film transistor array backplane: patent application, Patent No. WO03046964 A1, IPC No. 7C 09K 19/02 B.

Active matrix thin-film transistor array backplane : patent application. / Forbes, C. (Inventor); Gelbman, A. (Inventor); Gleskova, H. (Inventor); Turner, C. (Inventor); Wagner, S. (Inventor).

IPC No.: 7C 09K 19/02 B. Patent No.: WO03046964 A1.

Research output: Patent

TY - PAT

T1 - Active matrix thin-film transistor array backplane

T2 - patent application

AU - Forbes, C.

AU - Gelbman, A.

AU - Gleskova, H.

AU - Turner, C.

AU - Wagner, S.

PY - 2003/6/5

Y1 - 2003/6/5

N2 - A thin film transistor array fabricated on a polyimide substrate forms a backplane for an electronic display. The thin film transistor array incorporate gate electrodes, a gate insulating layer (44), semiconducting channel layers (50) deposited on top of the gate insulating layer (44), a source electrode (60), a drain electrode (60) and a contact layer (52) beneath each of the source and drain electrodes (60) and in contact with at least the channel layer (50). An insulating encapsulation layer (70) is positioned on the channel layer (50). The layers are deposited onto the polyimide substrate (32) using PECVD and etched using photolithography to form the backplane.

AB - A thin film transistor array fabricated on a polyimide substrate forms a backplane for an electronic display. The thin film transistor array incorporate gate electrodes, a gate insulating layer (44), semiconducting channel layers (50) deposited on top of the gate insulating layer (44), a source electrode (60), a drain electrode (60) and a contact layer (52) beneath each of the source and drain electrodes (60) and in contact with at least the channel layer (50). An insulating encapsulation layer (70) is positioned on the channel layer (50). The layers are deposited onto the polyimide substrate (32) using PECVD and etched using photolithography to form the backplane.

KW - thin film

KW - polymide substrate

KW - backplane

KW - gate electrodes

UR - http://www.patentlens.net/patentlens/patents.html?patnums=WO_2003_046964_A1&language=en&query=(WO03046964%20in%20publication_number)&stemming=true&returnTo=patentnumber.html%3Fquery%3D%26stemming%3Dtrue%26patentNumber%3DWO03046964%26collections%3DUS_B%2CEP_B%2CAU_B%2CUS_A%2CWO_A%2CAU_A%26language%3Den

M3 - Patent

M1 - WO03046964 A1

ER -

Forbes C, Gelbman A, Gleskova H, Turner C, Wagner S, inventors. Active matrix thin-film transistor array backplane: patent application. 7C 09K 19/02 B. 2003 Jun 5.