Abstract
A thin film transistor array fabricated on a polyimide substrate forms a backplane for an electronic display. The thin film transistor array incorporates gate electrodes, a gate insulating layer, semiconducting channel layers deposited on top of the gate insulating layer, a source electrode, a drain electrode and a contact layer beneath each of the source and drain electrodes and in contact with at least the channel layer. An insulating encapsulation layer is positioned on the channel layer. The layers are deposited onto the polyimide substrate using PECVD and etched using photolithography to form the backplane.
Original language | English |
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Patent number | US20040110326 A1 |
IPC | H01L021/00 |
Publication status | Published - 10 Jun 2004 |
Keywords
- thin film
- substrate conductivity
- gate electrodes
- polymide substrate