A scheme to improve the stability and accuracy of power hardware-in-the-loop simulation

Zhiwang Feng; Rafael Peña Alzola; Paschalis Seisopoulos; Efren Guillo Sansano; Mazheruddin Hussain Syed; Patrick Norman; Graeme Burt

doi:10.1109/IECON43393.2020.9254407

A scheme to improve the stability and accuracy of power hardware-in-the-loop simulation

Zhiwang Feng, Rafael Peña Alzola, Paschalis Seisopoulos, Efren Guillo Sansano, Mazheruddin Hussain Syed, Patrick Norman, Graeme Burt

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution book

15 Citations (Scopus)

65 Downloads (Pure)

Abstract

Power hardware-in-the-loop (PHIL) is a state-of-the-art simulation technique that combines real-time digital simulation and hardware experiments into a closed-loop testing environment. The transportation delay or communication latency impacts the stability and accuracy of PHIL simulations. In this paper, for the purpose of synchronizing the PHIL output signal and promoting both the stability and accuracy of PHIL simulation, a hybrid compensation scheme is proposed to compensate for the time delay in the PHIL configuration. A model-based compensator is implemented to shift the time delay out of the PHIL closed-loop to enhance PHIL stability. A time delay compensation model and its equivalent inverse model are employed in the PHIL closed-loop to compensate for the time delay. A phase lead compensator and digital linear-phase frequency sampling filter (FSF) are candidate compensation models to compensate for the time delay and reshape the phase curve on a harmonic-by-harmonic basis. Simulations are made to validate the effectiveness of the compensation scheme.

Original language	English
Title of host publication	IECON 2020 The 46th Annual Conference of the IEEE Industrial Electronics Society
Place of Publication	Piscataway, N.J.
Publisher	IEEE
Pages	5027-5032
Number of pages	6
ISBN (Electronic)	978-1-7281-5414-5
DOIs	https://doi.org/10.1109/IECON43393.2020.9254407
Publication status	Published - 18 Nov 2020
Event	IECON 2020 The 46th Annual Conference of the IEEE Industrial Electronics Society - Singapore, Singapore, Singapore Duration: 18 Oct 2020 → 21 Oct 2020 https://www.iecon2020.org/

Conference

Conference	IECON 2020 The 46th Annual Conference of the IEEE Industrial Electronics Society
Country/Territory	Singapore
City	Singapore
Period	18/10/20 → 21/10/20
Internet address	https://www.iecon2020.org/

Keywords

power hardware-in-the-loop (PHIL)
model-based compensator
time delay compensation
stability and accuracy
frequency sampling filter

Access to Document

10.1109/IECON43393.2020.9254407

Feng-etal-IECON-2020-A-scheme-to-improve-the-stability-and-accuracy-of-powerAccepted author manuscript, 906 KB

Dynamic Power Systems Laboratory
Burt, G. (Manager)
Electronic And Electrical Engineering
Facility/equipment: Facility

15 Citations
3 Article
1 Conference contribution book
1 Paper

Virtual shifting impedance method for extended range high-fidelity PHIL testing
Paspatis, A., Kontou, A., Feng, Z., Syed, M. H., Lauss, G., Burt, G., Kotsampopoulos, P. & Hatziargyriou, N., Mar 2024, In: IEEE Transactions on Industrial Electronics. 71, 3, p. 2903-2913 11 p.
Research output: Contribution to journal › Article › peer-review

Open Access
File
2 Citations (Scopus)

48 Downloads (Pure)
Adaptive Smith predictor for enhanced stability of power hardware-in-the-loop setups
Feng, Z., Peña-Alzola, R., Syed, M. H., Norman, P. J. & Burt, G. M., Oct 2023, In: IEEE Transactions on Industrial Electronics. 70, 10, p. 10204-10214 11 p.
Research output: Contribution to journal › Article › peer-review

Open Access
File
7 Citations (Scopus)

152 Downloads (Pure)
Current-type power hardware-in-the-loop interface for black-start testing of grid-forming converter
Feng, Z., Alassi, A., Syed, M. H., Pena Alzola, R., Ahmed, K. & Burt, G., 9 Dec 2022. 7 p.
Research output: Contribution to conference › Paper › peer-review

Open Access
File
6 Citations (Scopus)

128 Downloads (Pure)

Stability and accuracy enhancement of power hardware-in-the-loop simulation
Feng, Z. (Author), Pena Alzola, R. (Supervisor) & Burt, G. (Supervisor), 18 May 2023
Student thesis: Doctoral Thesis

Cite this

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title = "A scheme to improve the stability and accuracy of power hardware-in-the-loop simulation",

abstract = "Power hardware-in-the-loop (PHIL) is a state-of-the-art simulation technique that combines real-time digital simulation and hardware experiments into a closed-loop testing environment. The transportation delay or communication latency impacts the stability and accuracy of PHIL simulations. In this paper, for the purpose of synchronizing the PHIL output signal and promoting both the stability and accuracy of PHIL simulation, a hybrid compensation scheme is proposed to compensate for the time delay in the PHIL configuration. A model-based compensator is implemented to shift the time delay out of the PHIL closed-loop to enhance PHIL stability. A time delay compensation model and its equivalent inverse model are employed in the PHIL closed-loop to compensate for the time delay. A phase lead compensator and digital linear-phase frequency sampling filter (FSF) are candidate compensation models to compensate for the time delay and reshape the phase curve on a harmonic-by-harmonic basis. Simulations are made to validate the effectiveness of the compensation scheme.",

keywords = "power hardware-in-the-loop (PHIL), model-based compensator, time delay compensation, stability and accuracy, frequency sampling filter",

author = "Zhiwang Feng and {Pe{\~n}a Alzola}, Rafael and Paschalis Seisopoulos and {Guillo Sansano}, Efren and Syed, {Mazheruddin Hussain} and Patrick Norman and Graeme Burt",

note = "{\textcopyright} 2020 IEEE. Personal use of this material is permitted. Permission from IEEE must be obtained for all other uses, in any current or future media, including reprinting /republishing this material for advertising or promotional purposes, creating new collective works, for resale or redistribution to servers or lists, or reuse of any copyrighted component of this work in other works.; IECON 2020 The 46th Annual Conference of the IEEE Industrial Electronics Society ; Conference date: 18-10-2020 Through 21-10-2020",

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doi = "10.1109/IECON43393.2020.9254407",

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url = "https://www.iecon2020.org/",

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Feng, Z , Peña Alzola, R , Seisopoulos, P, Guillo Sansano, E, Syed, MH, Norman, P & Burt, G 2020, A scheme to improve the stability and accuracy of power hardware-in-the-loop simulation. in IECON 2020 The 46th Annual Conference of the IEEE Industrial Electronics Society. IEEE, Piscataway, N.J., pp. 5027-5032, IECON 2020 The 46th Annual Conference of the IEEE Industrial Electronics Society, Singapore, Singapore, 18/10/20. https://doi.org/10.1109/IECON43393.2020.9254407

A scheme to improve the stability and accuracy of power hardware-in-the-loop simulation. / Feng, Zhiwang ; Peña Alzola, Rafael ; Seisopoulos, Paschalis et al.
IECON 2020 The 46th Annual Conference of the IEEE Industrial Electronics Society. Piscataway, N.J.: IEEE, 2020. p. 5027-5032.

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution book

TY - GEN

T1 - A scheme to improve the stability and accuracy of power hardware-in-the-loop simulation

AU - Feng, Zhiwang

AU - Peña Alzola, Rafael

AU - Seisopoulos, Paschalis

AU - Guillo Sansano, Efren

AU - Syed, Mazheruddin Hussain

AU - Norman, Patrick

AU - Burt, Graeme

N1 - © 2020 IEEE. Personal use of this material is permitted. Permission from IEEE must be obtained for all other uses, in any current or future media, including reprinting /republishing this material for advertising or promotional purposes, creating new collective works, for resale or redistribution to servers or lists, or reuse of any copyrighted component of this work in other works.

PY - 2020/11/18

Y1 - 2020/11/18

N2 - Power hardware-in-the-loop (PHIL) is a state-of-the-art simulation technique that combines real-time digital simulation and hardware experiments into a closed-loop testing environment. The transportation delay or communication latency impacts the stability and accuracy of PHIL simulations. In this paper, for the purpose of synchronizing the PHIL output signal and promoting both the stability and accuracy of PHIL simulation, a hybrid compensation scheme is proposed to compensate for the time delay in the PHIL configuration. A model-based compensator is implemented to shift the time delay out of the PHIL closed-loop to enhance PHIL stability. A time delay compensation model and its equivalent inverse model are employed in the PHIL closed-loop to compensate for the time delay. A phase lead compensator and digital linear-phase frequency sampling filter (FSF) are candidate compensation models to compensate for the time delay and reshape the phase curve on a harmonic-by-harmonic basis. Simulations are made to validate the effectiveness of the compensation scheme.

AB - Power hardware-in-the-loop (PHIL) is a state-of-the-art simulation technique that combines real-time digital simulation and hardware experiments into a closed-loop testing environment. The transportation delay or communication latency impacts the stability and accuracy of PHIL simulations. In this paper, for the purpose of synchronizing the PHIL output signal and promoting both the stability and accuracy of PHIL simulation, a hybrid compensation scheme is proposed to compensate for the time delay in the PHIL configuration. A model-based compensator is implemented to shift the time delay out of the PHIL closed-loop to enhance PHIL stability. A time delay compensation model and its equivalent inverse model are employed in the PHIL closed-loop to compensate for the time delay. A phase lead compensator and digital linear-phase frequency sampling filter (FSF) are candidate compensation models to compensate for the time delay and reshape the phase curve on a harmonic-by-harmonic basis. Simulations are made to validate the effectiveness of the compensation scheme.

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KW - model-based compensator

KW - time delay compensation

KW - stability and accuracy

KW - frequency sampling filter

U2 - 10.1109/IECON43393.2020.9254407

DO - 10.1109/IECON43393.2020.9254407

M3 - Conference contribution book

SP - 5027

EP - 5032

BT - IECON 2020 The 46th Annual Conference of the IEEE Industrial Electronics Society

PB - IEEE

CY - Piscataway, N.J.

T2 - IECON 2020 The 46th Annual Conference of the IEEE Industrial Electronics Society

Y2 - 18 October 2020 through 21 October 2020

ER -

A scheme to improve the stability and accuracy of power hardware-in-the-loop simulation

Abstract

Conference

Keywords

Access to Document

Fingerprint

Equipment

Dynamic Power Systems Laboratory

Research output

Virtual shifting impedance method for extended range high-fidelity PHIL testing

Adaptive Smith predictor for enhanced stability of power hardware-in-the-loop setups

Current-type power hardware-in-the-loop interface for black-start testing of grid-forming converter

Student theses

Stability and accuracy enhancement of power hardware-in-the-loop simulation

Cite this