A planar Al-Si Schottky barrier metal-oxide-semiconductor field effect transistor operated at cryogenic temperatures

W. E. Purches, A. Rossi, R. Zhao, S. Kafanov, T. L. Duty, A. S. Dzurak, S. Rogge, G. C. Tettamanzi

Research output: Contribution to journalArticle

4 Citations (Scopus)

Abstract

Schottky Barrier-MOSFET technology offers intriguing possibilities for cryogenic nano-scale devices, such as Si quantum devices and superconducting devices. We present experimental results on a device architecture where the gate electrode is self-aligned with the device channel and overlaps the source and drain electrodes. This facilitates a sub-5 nm gap between the source/drain and channel, and no spacers are required. At cryogenic temperatures, such devices function as p-MOS Tunnel FETs, as determined by the Schottky barrier at the Al-Si interface, and as a further advantage, fabrication processes are compatible with both CMOS and superconducting logic technology.

Original languageEnglish
Article number063503
Number of pages5
JournalApplied Physics Letters
Volume107
Issue number6
DOIs
Publication statusPublished - 10 Aug 2015

Fingerprint

cryogenic temperature
metal oxide semiconductors
field effect transistors
superconducting devices
electrodes
spacers
cryogenics
logic
tunnels
CMOS
fabrication

Keywords

  • CMOS
  • Schottky Barrier-MOSFET
  • quantum devices

Cite this

Purches, W. E. ; Rossi, A. ; Zhao, R. ; Kafanov, S. ; Duty, T. L. ; Dzurak, A. S. ; Rogge, S. ; Tettamanzi, G. C. / A planar Al-Si Schottky barrier metal-oxide-semiconductor field effect transistor operated at cryogenic temperatures. In: Applied Physics Letters. 2015 ; Vol. 107, No. 6.
@article{ee0818e403d143e2afaea706132c544f,
title = "A planar Al-Si Schottky barrier metal-oxide-semiconductor field effect transistor operated at cryogenic temperatures",
abstract = "Schottky Barrier-MOSFET technology offers intriguing possibilities for cryogenic nano-scale devices, such as Si quantum devices and superconducting devices. We present experimental results on a device architecture where the gate electrode is self-aligned with the device channel and overlaps the source and drain electrodes. This facilitates a sub-5 nm gap between the source/drain and channel, and no spacers are required. At cryogenic temperatures, such devices function as p-MOS Tunnel FETs, as determined by the Schottky barrier at the Al-Si interface, and as a further advantage, fabrication processes are compatible with both CMOS and superconducting logic technology.",
keywords = "CMOS, Schottky Barrier-MOSFET, quantum devices",
author = "Purches, {W. E.} and A. Rossi and R. Zhao and S. Kafanov and Duty, {T. L.} and Dzurak, {A. S.} and S. Rogge and Tettamanzi, {G. C.}",
year = "2015",
month = "8",
day = "10",
doi = "10.1063/1.4928589",
language = "English",
volume = "107",
journal = "Applied Physics Letters",
issn = "0003-6951",
number = "6",

}

A planar Al-Si Schottky barrier metal-oxide-semiconductor field effect transistor operated at cryogenic temperatures. / Purches, W. E.; Rossi, A.; Zhao, R.; Kafanov, S.; Duty, T. L.; Dzurak, A. S.; Rogge, S.; Tettamanzi, G. C.

In: Applied Physics Letters, Vol. 107, No. 6, 063503, 10.08.2015.

Research output: Contribution to journalArticle

TY - JOUR

T1 - A planar Al-Si Schottky barrier metal-oxide-semiconductor field effect transistor operated at cryogenic temperatures

AU - Purches, W. E.

AU - Rossi, A.

AU - Zhao, R.

AU - Kafanov, S.

AU - Duty, T. L.

AU - Dzurak, A. S.

AU - Rogge, S.

AU - Tettamanzi, G. C.

PY - 2015/8/10

Y1 - 2015/8/10

N2 - Schottky Barrier-MOSFET technology offers intriguing possibilities for cryogenic nano-scale devices, such as Si quantum devices and superconducting devices. We present experimental results on a device architecture where the gate electrode is self-aligned with the device channel and overlaps the source and drain electrodes. This facilitates a sub-5 nm gap between the source/drain and channel, and no spacers are required. At cryogenic temperatures, such devices function as p-MOS Tunnel FETs, as determined by the Schottky barrier at the Al-Si interface, and as a further advantage, fabrication processes are compatible with both CMOS and superconducting logic technology.

AB - Schottky Barrier-MOSFET technology offers intriguing possibilities for cryogenic nano-scale devices, such as Si quantum devices and superconducting devices. We present experimental results on a device architecture where the gate electrode is self-aligned with the device channel and overlaps the source and drain electrodes. This facilitates a sub-5 nm gap between the source/drain and channel, and no spacers are required. At cryogenic temperatures, such devices function as p-MOS Tunnel FETs, as determined by the Schottky barrier at the Al-Si interface, and as a further advantage, fabrication processes are compatible with both CMOS and superconducting logic technology.

KW - CMOS

KW - Schottky Barrier-MOSFET

KW - quantum devices

UR - http://www.scopus.com/inward/record.url?scp=84939142008&partnerID=8YFLogxK

U2 - 10.1063/1.4928589

DO - 10.1063/1.4928589

M3 - Article

VL - 107

JO - Applied Physics Letters

JF - Applied Physics Letters

SN - 0003-6951

IS - 6

M1 - 063503

ER -