A digital system and method for testing analogue and mixed-signal circuits or systems

D.J. Hamilton (Inventor), B.P. Stimpson (Inventor), M. Bekheit (Inventor)

Research output: Patent

Abstract

A method of optimising a digital test signal for testing an analogue or mixed-signal circuit comprising determining a measure, for example a figure of merit, that is indicative of differences between the output of a fault free and the output of a known faulty circuit in response to an applied digital input signal. The digital input signal is then varied and another figure of merit is calculated for the fault free and the known faulty circuit for the new input signal. This is repeated a number of times, the digital input signal being varied each time. An optimum test signal is selected based on the determined figures of merit.
LanguageEnglish
Patent numberWO 2003/107019 A2
IPC7G 01R 31/00 A
Publication statusPublished - 24 Dec 2003

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Networks (circuits)
Testing

Keywords

  • analogue circuits
  • mixed-signal circuits
  • faulty circuits

Cite this

Hamilton, D. J., Stimpson, B. P., & Bekheit, M. (2003). IPC No. 7G 01R 31/00 A. A digital system and method for testing analogue and mixed-signal circuits or systems. (Patent No. WO 2003/107019 A2).
Hamilton, D.J. (Inventor) ; Stimpson, B.P. (Inventor) ; Bekheit, M. (Inventor). / A digital system and method for testing analogue and mixed-signal circuits or systems. IPC No.: 7G 01R 31/00 A. Patent No.: WO 2003/107019 A2.
@misc{326afca8f6cb46f985a8385f6a053c08,
title = "A digital system and method for testing analogue and mixed-signal circuits or systems",
abstract = "A method of optimising a digital test signal for testing an analogue or mixed-signal circuit comprising determining a measure, for example a figure of merit, that is indicative of differences between the output of a fault free and the output of a known faulty circuit in response to an applied digital input signal. The digital input signal is then varied and another figure of merit is calculated for the fault free and the known faulty circuit for the new input signal. This is repeated a number of times, the digital input signal being varied each time. An optimum test signal is selected based on the determined figures of merit.",
keywords = "analogue circuits, mixed-signal circuits, faulty circuits",
author = "D.J. Hamilton and B.P. Stimpson and M. Bekheit",
year = "2003",
month = "12",
day = "24",
language = "English",
type = "Patent",
note = "WO 2003/107019 A2; 7G 01R 31/00 A",

}

Hamilton, DJ, Stimpson, BP & Bekheit, M 2003, A digital system and method for testing analogue and mixed-signal circuits or systems, Patent No. WO 2003/107019 A2, IPC No. 7G 01R 31/00 A.

A digital system and method for testing analogue and mixed-signal circuits or systems. / Hamilton, D.J. (Inventor); Stimpson, B.P. (Inventor); Bekheit, M. (Inventor).

IPC No.: 7G 01R 31/00 A. Patent No.: WO 2003/107019 A2.

Research output: Patent

TY - PAT

T1 - A digital system and method for testing analogue and mixed-signal circuits or systems

AU - Hamilton, D.J.

AU - Stimpson, B.P.

AU - Bekheit, M.

PY - 2003/12/24

Y1 - 2003/12/24

N2 - A method of optimising a digital test signal for testing an analogue or mixed-signal circuit comprising determining a measure, for example a figure of merit, that is indicative of differences between the output of a fault free and the output of a known faulty circuit in response to an applied digital input signal. The digital input signal is then varied and another figure of merit is calculated for the fault free and the known faulty circuit for the new input signal. This is repeated a number of times, the digital input signal being varied each time. An optimum test signal is selected based on the determined figures of merit.

AB - A method of optimising a digital test signal for testing an analogue or mixed-signal circuit comprising determining a measure, for example a figure of merit, that is indicative of differences between the output of a fault free and the output of a known faulty circuit in response to an applied digital input signal. The digital input signal is then varied and another figure of merit is calculated for the fault free and the known faulty circuit for the new input signal. This is repeated a number of times, the digital input signal being varied each time. An optimum test signal is selected based on the determined figures of merit.

KW - analogue circuits

KW - mixed-signal circuits

KW - faulty circuits

UR - http://www.patentlens.net/patentlens/patents.html?patnums=WO_2003_107019_A2&language=en&query=(A%20AND%20digital%20AND%20system%20AND%20method%20AND%20for%20AND%20testing%20AND%20analogue%20AND%20mixed-signal%20AND%20(circuits%20OR%20systems)%20in%20fulltext)%20AND%20(hamilton%20in%20inventor)&stemming=true&returnTo=structured.html%3Fquery%3D%2528A%2BAND%2Bdigital%2BAND%2Bsystem%2BAND%2Bmethod%2BAND%2Bfor%2BAND%2Btesting%2BAND%2Banalogue%2BAND%2Bmixed-signal%2BAND%2B%2528circuits%2BOR%2Bsystems%2529%2Bin%2Bfulltext%2529%2BAND%2B%2528hamilton%2Bin%2Binventor%2529%26stemming%3Dtrue%26collections%3DUS_B%2CEP_B%2CAU_B%2CUS_A%2CWO_A%2CAU_A%26language%3Den%26pageLength%3D10%26fields%3Dfulltext%2Cinventor%2Cabstract%2Cinventor%2Capplicant

M3 - Patent

M1 - WO 2003/107019 A2

ER -

Hamilton DJ, Stimpson BP, Bekheit M, inventors. A digital system and method for testing analogue and mixed-signal circuits or systems. 7G 01R 31/00 A. 2003 Dec 24.