A CMOS dynamic random access architecture for radio-frequency readout of quantum devices

Simon Schaal*, Alessandro Rossi, Virginia N. Ciriano-Tejel, Tsung-Yeh Yang, Sylvain Barraud, John J. L. Morton, M. Fernando Gonzalez-Zalba

*Corresponding author for this work

Research output: Contribution to journalArticlepeer-review

53 Citations (Scopus)
67 Downloads (Pure)

Abstract

As quantum processors become more complex, they will require efficient interfaces to deliver signals for control and readout while keeping the number of inputs manageable. Complementary metal–oxide–semiconductor (CMOS) electronics offers established solutions to signal routing and dynamic access, and the use of a CMOS platform for the qubits themselves offers the attractive proposition of integrating classical and quantum devices on-chip. Here, we report a CMOS dynamic random access architecture for readout of multiple quantum devices operating at millikelvin temperatures. Our circuit is divided into cells, each containing a control field-effect transistor and a quantum dot device, formed in the channel of a nanowire transistor. This set-up allows selective readout of the quantum dot and charge storage on the quantum dot gate, similar to one-transistor–one-capacitor (1T-1C) dynamic random access technology. We demonstrate dynamic readout of two cells by interfacing them with a single radio-frequency resonator. Our approach provides a path to reduce the number of input lines per qubit and allow large-scale device arrays to be addressed.

Original languageEnglish
Pages (from-to)236-242
Number of pages7
JournalNature Electronics
Volume2
Issue number6
DOIs
Publication statusPublished - 17 Jun 2019

Funding

The authors thank S. Pauka, S. A. Lyon and M. Schormans for helpful discussions. This research received funding from the European Union’s Horizon 2020 research and innovation programme under grant agreement no. 688539 (http://mos-quito.eu) and the Seventh Framework Programme (FP7/2007-2013) through grant agreement no. 318397, as well as from the Engineering and Physical Sciences Research Council (EPSRC) through the Centre for Doctoral Training in Delivering Quantum Technologies (EP/L015242/1) and UNDEDD (EP/K025945/1). M.F.G.Z. and A.R. acknowledge support from the Winton Programme for the Physics of Sustainability and Hughes Hall, University of Cambridge.

Keywords

  • quantum processors
  • CMOS
  • complementary metal oxide semiconductor (CMOS)
  • CMOS platform

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