A 3.8-Gb/s laser driver with automatic power control (APC) using thermistors is presented. The chip was fabricated in 0.25mum 1P5M CMOS process. With a waveform shaping circuit, the driver could generate a 5mA to 60mA modulation current with its duty cycle maintained at 50%. A modified MUX circuit is also introduced to improve the jitter performance of both the direct and latched data output. And with a thermistor-APC compensation circuit, the laser power could be maintained within a temperature range from -30 degC to 80degC without using any monitor photodiode. Measurements on mounted chips show clear electrical eye diagrams operating over 3.8-Gb/s data rate with typical rise/fall times (20% to 80%) of 104/109ps. Moreover, an optical eye diagram is also demonstrated by connecting the driver with a 2.5-Gb/s 1310nm laser diode.
|Title of host publication||IEEE International Symposium on Circuits and Systems (ISCAS), 2007|
|Number of pages||4|
|Publication status||Published - 25 Jun 2007|
- power lasers
- driver circuits
- CMOS process
Li, D-U., Chen, W-H., Chang, L-X., & Yu, C-H. (2007). A 3.8-Gb/s CMOS laser driver with automatic power control using thermistors. In IEEE International Symposium on Circuits and Systems (ISCAS), 2007 (pp. 2546-2549). IEEE. https://doi.org/10.1109/ISCAS.2007.377834