A 192 X 128 time correlated SPAD image sensor in 40nm CMOS technology

Robert K. Henderson, Nick Johnston, Francesco Mattioli Della Rocca, Haochang Chen, David Day-Uei Li, Graham Hungerford, Richard Hirsch, David McLoskey, Philip Yip, David J.S. Birch

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A 192 X 128 pixel single photon avalanche diode (SPAD) time-resolved single photon counting (TCSPC) image sensor is implemented in STMicroelectronics 40-nm CMOS technology. The 13% fill factor, 18.4\,\,\mu \text {m} \times 9.2\,\,\mu \text{m} pixel contains a 33-ps resolution, 135-ns full scale, 12-bit time-to-digital converter (TDC) with 0.9-LSB differential and 5.64-LSB integral nonlinearity (DNL/INL). The sensor achieves a mean 219-ps full-width half-maximum (FWHM) impulse response function (IRF) and is operable at up to 18.6 kframes/s through 64 parallelized serial outputs. Cylindrical microlenses with a concentration factor of 3.25 increase the fill factor to 42%. The median dark count rate (DCR) is 25 Hz at 1.5-V excess bias. A digital calibration scheme integrated into a column of the imager allows off-chip digital process, voltage, and temperature (PVT) compensation of every frame on the fly. Fluorescence lifetime imaging microscopy (FLIM) results are presented.

Original languageEnglish
Pages (from-to)1907-1916
Number of pages10
JournalIEEE Journal of Solid-State Circuits
Issue number7
Early online date5 Apr 2019
Publication statusPublished - 31 Jul 2019


  • single photon avalanche diode
  • CMOS image sensor
  • fluorescence lifetime imaging microscopy
  • laser ranging


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