A 192 x 128 time correlated single photon counting imager in 40nm CMOS technology

Robert K. Henderson, Nick Johnston, Haochang Chen, David Day-Uei Li, Graham Hungerford, Richard Hirsch, Philip Yip, David McLoskey, David Birch

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

A 192 x 128 pixel single photon avalanche diode (SPAD) time-resolved single photon counting (TCPSC) image sensor is implemented in STMicroelectronics 40nm CMOS technology. The 13 % fill-factor, 18.4 x 9.2 mm pixel contains a 33 ps resolution, 135 ns full-scale, 12-bit time to digital converter (TDC) with 0.9 LSB differential and 8.7 LSB integral nonlinearity (DNL/INL). The sensor achieves a mean 219 ps fullwidth half maximum (FWHM) impulse response function (IRF) and a 5 mW core power consumption and is operable at up to 18.6 kfps. Cylindrical microlenses with a concentration factor of 3.15 increase the fill-factor to 41%. The median dark count rate (DCR) is 25 Hz at 1.5 V excess bias. Fluorescence lifetime imaging (FLIM) results are presented.
LanguageEnglish
Title of host publication44th European Solid-State Circuits Conference (ESSCIRC) 2018
Place of PublicationPiscataway, NJ
PublisherIEEE
Number of pages4
StatePublished - 4 Sep 2018
Event44th European Solid-State Circuits Conference - Dresden, Germany
Duration: 3 Sep 20186 Sep 2018

Conference

Conference44th European Solid-State Circuits Conference
CountryGermany
CityDresden
Period3/09/186/09/18

Fingerprint

Image sensors
Photons
Pixels
Avalanche diodes
Microlenses
Impulse response
Electric power utilization
Fluorescence
Imaging techniques
Sensors

Keywords

  • single photon avalanche diode
  • photon counting

Cite this

Henderson, R. K., Johnston, N., Chen, H., Li, D. D-U., Hungerford, G., Hirsch, R., ... Birch, D. (2018). A 192 x 128 time correlated single photon counting imager in 40nm CMOS technology. In 44th European Solid-State Circuits Conference (ESSCIRC) 2018 Piscataway, NJ: IEEE.
Henderson, Robert K. ; Johnston, Nick ; Chen, Haochang ; Li, David Day-Uei ; Hungerford, Graham ; Hirsch, Richard ; Yip, Philip ; McLoskey, David ; Birch, David. / A 192 x 128 time correlated single photon counting imager in 40nm CMOS technology. 44th European Solid-State Circuits Conference (ESSCIRC) 2018. Piscataway, NJ : IEEE, 2018.
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abstract = "A 192 x 128 pixel single photon avalanche diode (SPAD) time-resolved single photon counting (TCPSC) image sensor is implemented in STMicroelectronics 40nm CMOS technology. The 13 {\%} fill-factor, 18.4 x 9.2 mm pixel contains a 33 ps resolution, 135 ns full-scale, 12-bit time to digital converter (TDC) with 0.9 LSB differential and 8.7 LSB integral nonlinearity (DNL/INL). The sensor achieves a mean 219 ps fullwidth half maximum (FWHM) impulse response function (IRF) and a 5 mW core power consumption and is operable at up to 18.6 kfps. Cylindrical microlenses with a concentration factor of 3.15 increase the fill-factor to 41{\%}. The median dark count rate (DCR) is 25 Hz at 1.5 V excess bias. Fluorescence lifetime imaging (FLIM) results are presented.",
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Henderson, RK, Johnston, N, Chen, H, Li, DD-U, Hungerford, G, Hirsch, R, Yip, P, McLoskey, D & Birch, D 2018, A 192 x 128 time correlated single photon counting imager in 40nm CMOS technology. in 44th European Solid-State Circuits Conference (ESSCIRC) 2018. IEEE, Piscataway, NJ, 44th European Solid-State Circuits Conference, Dresden, Germany, 3/09/18.

A 192 x 128 time correlated single photon counting imager in 40nm CMOS technology. / Henderson, Robert K.; Johnston, Nick; Chen, Haochang; Li, David Day-Uei; Hungerford, Graham; Hirsch, Richard; Yip, Philip; McLoskey, David; Birch, David.

44th European Solid-State Circuits Conference (ESSCIRC) 2018. Piscataway, NJ : IEEE, 2018.

Research output: Chapter in Book/Report/Conference proceedingConference contribution

TY - GEN

T1 - A 192 x 128 time correlated single photon counting imager in 40nm CMOS technology

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AU - Johnston,Nick

AU - Chen,Haochang

AU - Li,David Day-Uei

AU - Hungerford,Graham

AU - Hirsch,Richard

AU - Yip,Philip

AU - McLoskey,David

AU - Birch,David

N1 - © 2018 IEEE. Personal use of this material is permitted. Permission from IEEE must be obtained for all other uses, in any current or future media, including reprinting/republishing this material for advertising or promotional purposes, creating new collective works, for resale or redistribution to servers or lists, or reuse of any copyrighted component of this work in other works.

PY - 2018/9/4

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N2 - A 192 x 128 pixel single photon avalanche diode (SPAD) time-resolved single photon counting (TCPSC) image sensor is implemented in STMicroelectronics 40nm CMOS technology. The 13 % fill-factor, 18.4 x 9.2 mm pixel contains a 33 ps resolution, 135 ns full-scale, 12-bit time to digital converter (TDC) with 0.9 LSB differential and 8.7 LSB integral nonlinearity (DNL/INL). The sensor achieves a mean 219 ps fullwidth half maximum (FWHM) impulse response function (IRF) and a 5 mW core power consumption and is operable at up to 18.6 kfps. Cylindrical microlenses with a concentration factor of 3.15 increase the fill-factor to 41%. The median dark count rate (DCR) is 25 Hz at 1.5 V excess bias. Fluorescence lifetime imaging (FLIM) results are presented.

AB - A 192 x 128 pixel single photon avalanche diode (SPAD) time-resolved single photon counting (TCPSC) image sensor is implemented in STMicroelectronics 40nm CMOS technology. The 13 % fill-factor, 18.4 x 9.2 mm pixel contains a 33 ps resolution, 135 ns full-scale, 12-bit time to digital converter (TDC) with 0.9 LSB differential and 8.7 LSB integral nonlinearity (DNL/INL). The sensor achieves a mean 219 ps fullwidth half maximum (FWHM) impulse response function (IRF) and a 5 mW core power consumption and is operable at up to 18.6 kfps. Cylindrical microlenses with a concentration factor of 3.15 increase the fill-factor to 41%. The median dark count rate (DCR) is 25 Hz at 1.5 V excess bias. Fluorescence lifetime imaging (FLIM) results are presented.

KW - single photon avalanche diode

KW - photon counting

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M3 - Conference contribution

BT - 44th European Solid-State Circuits Conference (ESSCIRC) 2018

PB - IEEE

CY - Piscataway, NJ

ER -

Henderson RK, Johnston N, Chen H, Li DD-U, Hungerford G, Hirsch R et al. A 192 x 128 time correlated single photon counting imager in 40nm CMOS technology. In 44th European Solid-State Circuits Conference (ESSCIRC) 2018. Piscataway, NJ: IEEE. 2018.