Abstract
| Language | English |
|---|---|
| Title of host publication | 44th European Solid-State Circuits Conference (ESSCIRC) 2018 |
| Place of Publication | Piscataway, NJ |
| Publisher | IEEE |
| Number of pages | 4 |
| Publication status | Published - 4 Sep 2018 |
| Event | 44th European Solid-State Circuits Conference - Dresden, Germany Duration: 3 Sep 2018 → 6 Sep 2018 |
Conference
| Conference | 44th European Solid-State Circuits Conference |
|---|---|
| Country | Germany |
| City | Dresden |
| Period | 3/09/18 → 6/09/18 |
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Keywords
- single photon avalanche diode
- photon counting
Cite this
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A 192 x 128 time correlated single photon counting imager in 40nm CMOS technology. / Henderson, Robert K.; Johnston, Nick; Chen, Haochang; Li, David Day-Uei; Hungerford, Graham; Hirsch, Richard; Yip, Philip; McLoskey, David; Birch, David.
44th European Solid-State Circuits Conference (ESSCIRC) 2018. Piscataway, NJ : IEEE, 2018.Research output: Chapter in Book/Report/Conference proceeding › Conference contribution
TY - GEN
T1 - A 192 x 128 time correlated single photon counting imager in 40nm CMOS technology
AU - Henderson, Robert K.
AU - Johnston, Nick
AU - Chen, Haochang
AU - Li, David Day-Uei
AU - Hungerford, Graham
AU - Hirsch, Richard
AU - Yip, Philip
AU - McLoskey, David
AU - Birch, David
N1 - © 2018 IEEE. Personal use of this material is permitted. Permission from IEEE must be obtained for all other uses, in any current or future media, including reprinting/republishing this material for advertising or promotional purposes, creating new collective works, for resale or redistribution to servers or lists, or reuse of any copyrighted component of this work in other works.
PY - 2018/9/4
Y1 - 2018/9/4
N2 - A 192 x 128 pixel single photon avalanche diode (SPAD) time-resolved single photon counting (TCPSC) image sensor is implemented in STMicroelectronics 40nm CMOS technology. The 13 % fill-factor, 18.4 x 9.2 mm pixel contains a 33 ps resolution, 135 ns full-scale, 12-bit time to digital converter (TDC) with 0.9 LSB differential and 8.7 LSB integral nonlinearity (DNL/INL). The sensor achieves a mean 219 ps fullwidth half maximum (FWHM) impulse response function (IRF) and a 5 mW core power consumption and is operable at up to 18.6 kfps. Cylindrical microlenses with a concentration factor of 3.15 increase the fill-factor to 41%. The median dark count rate (DCR) is 25 Hz at 1.5 V excess bias. Fluorescence lifetime imaging (FLIM) results are presented.
AB - A 192 x 128 pixel single photon avalanche diode (SPAD) time-resolved single photon counting (TCPSC) image sensor is implemented in STMicroelectronics 40nm CMOS technology. The 13 % fill-factor, 18.4 x 9.2 mm pixel contains a 33 ps resolution, 135 ns full-scale, 12-bit time to digital converter (TDC) with 0.9 LSB differential and 8.7 LSB integral nonlinearity (DNL/INL). The sensor achieves a mean 219 ps fullwidth half maximum (FWHM) impulse response function (IRF) and a 5 mW core power consumption and is operable at up to 18.6 kfps. Cylindrical microlenses with a concentration factor of 3.15 increase the fill-factor to 41%. The median dark count rate (DCR) is 25 Hz at 1.5 V excess bias. Fluorescence lifetime imaging (FLIM) results are presented.
KW - single photon avalanche diode
KW - photon counting
UR - https://www.esscirc-essderc2018.org/
M3 - Conference contribution
BT - 44th European Solid-State Circuits Conference (ESSCIRC) 2018
PB - IEEE
CY - Piscataway, NJ
ER -