Soft-Core ACS Hardware-in-the-loop Testing Component

  • Post, Mark, York University, Canada, (Academic)

Project: Projects from Previous Employment

Description

Constructed a MATLAB hardware-in-the-loop testbed & simulated nanosatellite sensors with microcontrollers; Developed sensor models and interface code for simulating orbital conditions for an FPGA-based control system. Work was funded by a CSA STDP grant.
StatusFinished
Effective start/end date1/06/131/09/13