Paschalis Seisopoulos - Research output - University of Strathclyde

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2 Conference contribution book

2 results

2021
Interface compensation for more accurate power transfer and signal synchronization within power hardware-in-the-loop simulation
Feng, Z., Pena Alzola, R., Seisopoulos, P., Syed, M. H., Guillo-Sansano, E., Norman, P. & Burt, G., 13 Nov 2021, IECON 2021 – 47th Annual Conference of the IEEE Industrial Electronics Society. Piscataway, N.J.: IEEE, 8 p. (IECON Proceedings (Industrial Electronics Conference); vol. 2021-October).
Research output: Chapter in Book/Report/Conference proceeding › Conference contribution book

Open Access
File
6 Citations (Scopus)

54 Downloads (Pure)
2020
A scheme to improve the stability and accuracy of power hardware-in-the-loop simulation
Feng, Z., Peña Alzola, R., Seisopoulos, P., Guillo Sansano, E., Syed, M. H., Norman, P. & Burt, G., 18 Nov 2020, IECON 2020 The 46th Annual Conference of the IEEE Industrial Electronics Society. Piscataway, N.J.: IEEE, p. 5027-5032 6 p.
Research output: Chapter in Book/Report/Conference proceeding › Conference contribution book

Open Access
File
15 Citations (Scopus)

65 Downloads (Pure)