Projects per year
Personal profile
Personal Statement
I completed both undergraduate and postgraduate studies at Strathclyde. I joined the University staff in 2007 as a Research Fellow, and switched title to Teaching Fellow in 2013 (although retaining interests in research and knowledge exchange), and was promoted to Senior Teaching Fellow in 2017.
My work focuses on the hardware implementation of Digital Signal Processing (DSP) systems, primarily with an emphasis on communications applications, and Software Defined Radio (SDR). Working in a field of direct relevance to industry really appeals to me. My focus is on Field Programmable Gate Arrays (FPGAs) and related technologies, and the design tools and methods that support them.
My teaching role involves taking classes on Hardware Description Language (HDL) design, Simulink-based design, and FPGAs, focusing on practical skills that will equip graduates for roles in industry. I am also involved in authoring training materials for the wider academic community (and beyond), and I have co-authored several books on my areas of interest.
Expertise & Capabilities
- Digital Signal Processing (DSP) implementation
- DSP enabled radio / software defined radio
- Xilinx FPGAs and design flows
- Xilinx Zynq System on Chip (SoC)
- MATLAB & Simulink based design for FPGAs
- VHDL
- DSP / FPGA professional training
Teaching Interests
I currently teach sections of three different classes... Firstly "Digital Electronics Systems" (a 2nd year class), in which students are introduced to the VHDL hardware description language, digital device technologies, and the concept of a design flow. Secondly, the digital part of "Analogue and Digital Systems Design", wherein students learn further VHDL skills and start working with block based design tools. The third is "DSP and FPGA Based Embedded Systems Design", in which I teach the FPGA-focused section of the class. Additionally, I am involved in supervising student projects in these areas.
Expertise related to UN Sustainable Development Goals
In 2015, UN member states agreed to 17 global Sustainable Development Goals (SDGs) to end poverty, protect the planet and ensure prosperity for all. This person’s work contributes towards the following SDG(s):
Education/Academic qualification
Doctor of Philosophy, On Code Division Multiple Access Applied to SpeckNets, UNIVERSITY OF STRATHCLYDE
Award Date: 1 Jan 2008
Master of Engineering, Electronic & Electrical Engineering with Business Studies (with distinction), UNIVERSITY OF STRATHCLYDE
Award Date: 1 Jan 2003
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- 1 Similar Profiles
Collaborations and top research areas from the last five years
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Industrial CASE Account - University of Strathclyde 2024 | Gillan, Euan
Stewart, R. (Principal Investigator), Crockett, L. (Co-investigator) & Gillan, E. (Research Co-investigator)
EPSRC (Engineering and Physical Sciences Research Council)
1/10/24 → 1/10/28
Project: Research Studentship Case - Internally allocated
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Spectrum Sharing and Sensing in non-3GPP Bands for 5G/6G
Stewart, R. (Principal Investigator) & Crockett, L. (Research Co-investigator)
EPSRC (Engineering and Physical Sciences Research Council)
1/07/24 → 31/03/25
Project: Research
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RFSoC modulation classification with streaming CNN: data set generation & quantized-aware training
MacLellan, A., Crockett, L. & Stewart, R., 3 Dec 2024, (E-pub ahead of print) In: IEEE Open Journal of Circuits and Systems.Research output: Contribution to journal › Article › peer-review
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Detection of weak transient broadband signals using a polynomial subspace and likelihood ratio test approach
Pahalson, C. A. D., Crockett, L. H. & Weiss, S., 30 Aug 2024, 32nd European Signal Processing Conference: EUSIPCO 2024. Piscataway, NJ: IEEE, p. 1312-1316 5 p. 2028Research output: Chapter in Book/Report/Conference proceeding › Conference contribution book
Open AccessFile1 Citation (Scopus)5 Downloads (Pure)
Datasets
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Data for: "Low-cost, High-speed Parallel FIR Filters for RFSoC Front-Ends Enabled by CλaSH"
Ramsay, C. (Creator), Crockett, L. H. (Supervisor) & Stewart, R. (Supervisor), University of Strathclyde, 15 Nov 2021
DOI: 10.15129/a2c118f2-48a8-40d2-8896-89b9da71a4be, https://github.com/cramsay/conifer
Dataset
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Data for "Toatie --- Functional Hardware Description with Dependent Types"
Ramsay, C. (Creator), Crockett, L. H. (Supervisor) & Stewart, R. (Supervisor), University of Strathclyde, 11 Jul 2023
DOI: 10.15129/fd83f191-2dc1-4839-adbb-684bac5ecd0c, https://github.com/cramsay/toatie/
Dataset
Prizes
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Best Student Paper Award
Northcote, D. (Recipient), Crockett, L. H. (Recipient) & Murray, P. (Recipient), 29 May 2018
Prize: Prize (including medals and awards)
File
Activities
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My Engineering Journey So Far… (and some thoughts on women in engineering)
Crockett, L. H. (Speaker)
21 Jun 2024Activity: Talk or presentation types › Invited talk
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The Opportunities of RF-Sampling Software Defined Radio
Crockett, L. H. (Invited speaker)
6 Nov 2023Activity: Talk or presentation types › Invited talk