Projects per year
Personal profile
Education/Academic qualification
Bachelor of Engineering, University Of Strathclyde
Sep 2011 → Jun 2015
Keywords
- SoC
- FPGA
- Image Processing
- Zynq
- Video Processing
Fingerprint Dive into the research topics where David Northcote is active. These topic labels come from the works of this person. Together they form a unique fingerprint.
- 3 Similar Profiles
Field programmable gate arrays (FPGA)
Engineering & Materials Science
Data storage equipment
Engineering & Materials Science
Hough transforms
Engineering & Materials Science
Learning systems
Engineering & Materials Science
Students
Engineering & Materials Science
System-on-chip
Engineering & Materials Science
Computer hardware
Engineering & Materials Science
Software engineering
Engineering & Materials Science
Projects 2015 2019
- 1 Finished
Doctoral Training Partnership (DTP - University of Strathclyde) | Northcote, David
Crockett, L. H., Murray, P. & Northcote, D.
EPSRC (Engineering and Physical Sciences Research Council)
1/10/15 → 1/04/19
Project: Research Studentship - Internally Allocated › Research Studentship (Internally Allocated)
Research Output 2015 2019
Exploring Zynq MPSoC: With PYNQ and Machine Learning Applications
Crockett, L., Northcote, D., Ramsay, C., Robinson, F. & Stewart, R., 11 Apr 2019, Glasgow. 642 p.Research output: Book/Report › Book
Learning systems
Computer hardware
Field programmable gate arrays (FPGA)
Software engineering
Managers
FPGA implementation of a memory-efficient Hough Parameter Space for the detection of lines
Northcote, D., Crockett, L. H. & Murray, P., 4 May 2018, 2018 IEEE International Symposium on Circuits and Systems (ISCAS). Piscataway, N.J.: IEEE, 5 p.Research output: Chapter in Book/Report/Conference proceeding › Conference contribution book
Open Access
File
Hough transforms
Field programmable gate arrays (FPGA)
Data storage equipment
Advanced driver assistance systems
Pixels
Datasets
Angular Regions - Line Hough Transform (AR-LHT) Implementation on Field Programmable Gate Array (FPGA)
Northcote, D. (Creator), University of Strathclyde, 24 Jan 2019
DOI: 10.15129/c6f8abc4-4bcb-4657-b71f-be1b057a9b43, https://github.com/dnorthcote/arlht2fpga/tree/v1.0.0-beta and one more link, http://www.iscas2018.org/ (show fewer)
Dataset
Prizes
Best Student Paper Award
David Northcote (Recipient), Louise Helen Crockett (Recipient) & Paul Murray (Recipient), 29 May 2018
Prize: Prize (including medals and awards)
File
Field programmable gate arrays (FPGA)
Students
Data storage equipment